drivers/pinctrl/sophgo/pinctrl-cv18xx.h
Source file repositories/reference/linux-study-clean/drivers/pinctrl/sophgo/pinctrl-cv18xx.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/sophgo/pinctrl-cv18xx.h- Extension
.h- Size
- 3126 bytes
- Lines
- 136
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinconf.hpinctrl-sophgo.h
Detected Declarations
struct cv1800_pinmuxstruct cv1800_pinmux2struct cv1800_pinconfstruct cv1800_pinenum cv1800_pin_io_typefunction cv1800_pin_io_type
Annotated Snippet
struct cv1800_pinmux {
u16 offset;
u8 area;
u8 max;
};
struct cv1800_pinmux2 {
u16 offset;
u8 area;
u8 max;
u8 pfunc;
};
struct cv1800_pinconf {
u16 offset;
u8 area;
};
#define CV1800_PIN_HAVE_MUX2 BIT(0)
#define CV1800_PIN_IO_TYPE GENMASK(2, 1)
#define CV1800_PIN_FLAG_IO_TYPE(type) \
FIELD_PREP_CONST(CV1800_PIN_IO_TYPE, type)
struct cv1800_pin {
struct sophgo_pin pin;
u8 power_domain;
struct cv1800_pinmux mux;
struct cv1800_pinmux2 mux2;
struct cv1800_pinconf conf;
};
#define sophgo_to_cv1800_pin(_pin) \
container_of((_pin), struct cv1800_pin, pin)
#define PIN_POWER_STATE_1V8 1800
#define PIN_POWER_STATE_3V3 3300
static inline enum cv1800_pin_io_type cv1800_pin_io_type(const struct cv1800_pin *pin)
{
return FIELD_GET(CV1800_PIN_IO_TYPE, pin->pin.flags);
};
extern const struct pinctrl_ops cv1800_pctrl_ops;
extern const struct pinmux_ops cv1800_pmx_ops;
extern const struct pinconf_ops cv1800_pconf_ops;
extern const struct sophgo_cfg_ops cv1800_cfg_ops;
#define CV1800_FUNC_PIN(_id, _power_domain, _type, \
_mux_area, _mux_offset, _mux_func_max) \
{ \
.pin = { \
.id = (_id), \
.flags = CV1800_PIN_FLAG_IO_TYPE(_type), \
}, \
.power_domain = (_power_domain), \
.mux = { \
.area = (_mux_area), \
.offset = (_mux_offset), \
.max = (_mux_func_max), \
}, \
}
#define CV1800_GENERAL_PIN(_id, _power_domain, _type, \
_mux_area, _mux_offset, _mux_func_max, \
_conf_area, _conf_offset) \
{ \
.pin = { \
.id = (_id), \
.flags = CV1800_PIN_FLAG_IO_TYPE(_type), \
}, \
.power_domain = (_power_domain), \
.mux = { \
.area = (_mux_area), \
.offset = (_mux_offset), \
.max = (_mux_func_max), \
}, \
.conf = { \
.area = (_conf_area), \
.offset = (_conf_offset), \
}, \
}
#define CV1800_GENERATE_PIN_MUX2(_id, _power_domain, _type, \
_mux_area, _mux_offset, _mux_func_max, \
_mux2_area, _mux2_offset, \
_mux2_func_max, \
_conf_area, _conf_offset) \
{ \
.pin = { \
.id = (_id), \
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/pinctrl/pinctrl.h`, `linux/pinctrl/pinconf.h`, `pinctrl-sophgo.h`.
- Detected declarations: `struct cv1800_pinmux`, `struct cv1800_pinmux2`, `struct cv1800_pinconf`, `struct cv1800_pin`, `enum cv1800_pin_io_type`, `function cv1800_pin_io_type`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.