drivers/pinctrl/sophgo/pinctrl-sg2042.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/sophgo/pinctrl-sg2042.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/sophgo/pinctrl-sg2042.c
Extension
.c
Size
26018 bytes
Lines
656
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Sophgo SG2042 SoC pinctrl driver.
 *
 * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
 */

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>

#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include <dt-bindings/pinctrl/pinctrl-sg2042.h>

#include "pinctrl-sg2042.h"

static int sg2042_get_pull_up(const struct sophgo_pin *sp, const u32 *psmap)
{
	return 35000;
}

static int sg2042_get_pull_down(const struct sophgo_pin *sp, const u32 *psmap)
{
	return 28000;
}

static const u32 sg2042_oc_map[] = {
	5400,  8100,  10700, 13400,
	16100, 18800, 21400, 24100,
	26800, 29400, 32100, 34800,
	37400, 40100, 42800, 45400
};

static int sg2042_get_oc_map(const struct sophgo_pin *sp, const u32 *psmap,
			     const u32 **map)
{
	*map = sg2042_oc_map;
	return ARRAY_SIZE(sg2042_oc_map);
}

static const struct sophgo_vddio_cfg_ops sg2042_vddio_cfg_ops = {
	.get_pull_up		= sg2042_get_pull_up,
	.get_pull_down		= sg2042_get_pull_down,
	.get_oc_map		= sg2042_get_oc_map,
};

static const struct pinctrl_pin_desc sg2042_pins[] = {
	PINCTRL_PIN(PIN_LPC_LCLK,		"lpc_lclk"),
	PINCTRL_PIN(PIN_LPC_LFRAME,		"lpc_lframe"),
	PINCTRL_PIN(PIN_LPC_LAD0,		"lpc_lad0"),
	PINCTRL_PIN(PIN_LPC_LAD1,		"lpc_lad1"),
	PINCTRL_PIN(PIN_LPC_LAD2,		"lpc_lad2"),
	PINCTRL_PIN(PIN_LPC_LAD3,		"lpc_lad3"),
	PINCTRL_PIN(PIN_LPC_LDRQ0,		"lpc_ldrq0"),
	PINCTRL_PIN(PIN_LPC_LDRQ1,		"lpc_ldrq1"),
	PINCTRL_PIN(PIN_LPC_SERIRQ,		"lpc_serirq"),
	PINCTRL_PIN(PIN_LPC_CLKRUN,		"lpc_clkrun"),
	PINCTRL_PIN(PIN_LPC_LPME,		"lpc_lpme"),
	PINCTRL_PIN(PIN_LPC_LPCPD,		"lpc_lpcpd"),
	PINCTRL_PIN(PIN_LPC_LSMI,		"lpc_lsmi"),
	PINCTRL_PIN(PIN_PCIE0_L0_RESET,		"pcie0_l0_reset"),
	PINCTRL_PIN(PIN_PCIE0_L1_RESET,		"pcie0_l1_reset"),
	PINCTRL_PIN(PIN_PCIE0_L0_WAKEUP,	"pcie0_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE0_L1_WAKEUP,	"pcie0_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE0_L0_CLKREQ_IN,	"pcie0_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE0_L1_CLKREQ_IN,	"pcie0_l1_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE1_L0_RESET,		"pcie1_l0_reset"),
	PINCTRL_PIN(PIN_PCIE1_L1_RESET,		"pcie1_l1_reset"),
	PINCTRL_PIN(PIN_PCIE1_L0_WAKEUP,	"pcie1_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE1_L1_WAKEUP,	"pcie1_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE1_L0_CLKREQ_IN,	"pcie1_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE1_L1_CLKREQ_IN,	"pcie1_l1_clkreq_in"),
	PINCTRL_PIN(PIN_SPIF0_CLK_SEL1,		"spif0_clk_sel1"),
	PINCTRL_PIN(PIN_SPIF0_CLK_SEL0,		"spif0_clk_sel0"),
	PINCTRL_PIN(PIN_SPIF0_WP,		"spif0_wp"),
	PINCTRL_PIN(PIN_SPIF0_HOLD,		"spif0_hold"),
	PINCTRL_PIN(PIN_SPIF0_SDI,		"spif0_sdi"),
	PINCTRL_PIN(PIN_SPIF0_CS,		"spif0_cs"),
	PINCTRL_PIN(PIN_SPIF0_SCK,		"spif0_sck"),
	PINCTRL_PIN(PIN_SPIF0_SDO,		"spif0_sdo"),
	PINCTRL_PIN(PIN_SPIF1_CLK_SEL1,		"spif1_clk_sel1"),
	PINCTRL_PIN(PIN_SPIF1_CLK_SEL0,		"spif1_clk_sel0"),
	PINCTRL_PIN(PIN_SPIF1_WP,		"spif1_wp"),
	PINCTRL_PIN(PIN_SPIF1_HOLD,		"spif1_hold"),
	PINCTRL_PIN(PIN_SPIF1_SDI,		"spif1_sdi"),
	PINCTRL_PIN(PIN_SPIF1_CS,		"spif1_cs"),
	PINCTRL_PIN(PIN_SPIF1_SCK,		"spif1_sck"),
	PINCTRL_PIN(PIN_SPIF1_SDO,		"spif1_sdo"),

Annotation

Implementation Notes