drivers/pinctrl/sophgo/pinctrl-sg2044.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/sophgo/pinctrl-sg2044.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/sophgo/pinctrl-sg2044.c
Extension
.c
Size
26683 bytes
Lines
719
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Sophgo SG2042 SoC pinctrl driver.
 *
 * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
 */

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>

#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include <dt-bindings/pinctrl/pinctrl-sg2044.h>

#include "pinctrl-sg2042.h"

static int sg2044_get_pull_up(const struct sophgo_pin *sp, const u32 *psmap)
{
	return 19500;
}

static int sg2044_get_pull_down(const struct sophgo_pin *sp, const u32 *psmap)
{
	return 23200;
}

static const u32 sg2044_oc_map[] = {
	3200,  6400,  9600,  12700,
	15900, 19100, 22200, 25300,
	29500, 32700, 35900, 39000,
	42000, 45200, 48300, 51400
};

static int sg2044_get_oc_map(const struct sophgo_pin *sp, const u32 *psmap,
			     const u32 **map)
{
	*map = sg2044_oc_map;
	return ARRAY_SIZE(sg2044_oc_map);
}

static const struct sophgo_vddio_cfg_ops sg2044_vddio_cfg_ops = {
	.get_pull_up		= sg2044_get_pull_up,
	.get_pull_down		= sg2044_get_pull_down,
	.get_oc_map		= sg2044_get_oc_map,
};

static const struct pinctrl_pin_desc sg2044_pins[] = {
	PINCTRL_PIN(PIN_IIC0_SMBSUS_IN,		"iic0_smbsus_in"),
	PINCTRL_PIN(PIN_IIC0_SMBSUS_OUT,	"iic0_smbsus_out"),
	PINCTRL_PIN(PIN_IIC0_SMBALERT,		"iic0_smbalert"),
	PINCTRL_PIN(PIN_IIC1_SMBSUS_IN,		"iic1_smbsus_in"),
	PINCTRL_PIN(PIN_IIC1_SMBSUS_OUT,	"iic1_smbsus_out"),
	PINCTRL_PIN(PIN_IIC1_SMBALERT,		"iic1_smbalert"),
	PINCTRL_PIN(PIN_IIC2_SMBSUS_IN,		"iic2_smbsus_in"),
	PINCTRL_PIN(PIN_IIC2_SMBSUS_OUT,	"iic2_smbsus_out"),
	PINCTRL_PIN(PIN_IIC2_SMBALERT,		"iic2_smbalert"),
	PINCTRL_PIN(PIN_IIC3_SMBSUS_IN,		"iic3_smbsus_in"),
	PINCTRL_PIN(PIN_IIC3_SMBSUS_OUT,	"iic3_smbsus_out"),
	PINCTRL_PIN(PIN_IIC3_SMBALERT,		"iic3_smbalert"),
	PINCTRL_PIN(PIN_PCIE0_L0_RESET,		"pcie0_l0_reset"),
	PINCTRL_PIN(PIN_PCIE0_L1_RESET,		"pcie0_l1_reset"),
	PINCTRL_PIN(PIN_PCIE0_L0_WAKEUP,	"pcie0_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE0_L1_WAKEUP,	"pcie0_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE0_L0_CLKREQ_IN,	"pcie0_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE0_L1_CLKREQ_IN,	"pcie0_l1_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE1_L0_RESET,		"pcie1_l0_reset"),
	PINCTRL_PIN(PIN_PCIE1_L1_RESET,		"pcie1_l1_reset"),
	PINCTRL_PIN(PIN_PCIE1_L0_WAKEUP,	"pcie1_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE1_L1_WAKEUP,	"pcie1_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE1_L0_CLKREQ_IN,	"pcie1_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE1_L1_CLKREQ_IN,	"pcie1_l1_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE2_L0_RESET,		"pcie2_l0_reset"),
	PINCTRL_PIN(PIN_PCIE2_L1_RESET,		"pcie2_l1_reset"),
	PINCTRL_PIN(PIN_PCIE2_L0_WAKEUP,	"pcie2_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE2_L1_WAKEUP,	"pcie2_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE2_L0_CLKREQ_IN,	"pcie2_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE2_L1_CLKREQ_IN,	"pcie2_l1_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE3_L0_RESET,		"pcie3_l0_reset"),
	PINCTRL_PIN(PIN_PCIE3_L1_RESET,		"pcie3_l1_reset"),
	PINCTRL_PIN(PIN_PCIE3_L0_WAKEUP,	"pcie3_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE3_L1_WAKEUP,	"pcie3_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE3_L0_CLKREQ_IN,	"pcie3_l0_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE3_L1_CLKREQ_IN,	"pcie3_l1_clkreq_in"),
	PINCTRL_PIN(PIN_PCIE4_L0_RESET,		"pcie4_l0_reset"),
	PINCTRL_PIN(PIN_PCIE4_L1_RESET,		"pcie4_l1_reset"),
	PINCTRL_PIN(PIN_PCIE4_L0_WAKEUP,	"pcie4_l0_wakeup"),
	PINCTRL_PIN(PIN_PCIE4_L1_WAKEUP,	"pcie4_l1_wakeup"),
	PINCTRL_PIN(PIN_PCIE4_L0_CLKREQ_IN,	"pcie4_l0_clkreq_in"),

Annotation

Implementation Notes