drivers/pinctrl/spear/pinctrl-spear320.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/spear/pinctrl-spear320.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/spear/pinctrl-spear320.c- Extension
.c- Size
- 90961 bytes
- Lines
- 3450
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/err.hlinux/init.hlinux/mod_devicetable.hlinux/platform_device.hpinctrl-spear3xx.h
Detected Declarations
function spear320_pinctrl_probefunction spear320_pinctrl_init
Annotated Snippet
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include "pinctrl-spear3xx.h"
#define DRIVER_NAME "spear320-pinmux"
/* addresses */
#define PMX_CONFIG_REG 0x0C
#define MODE_CONFIG_REG 0x10
#define MODE_EXT_CONFIG_REG 0x18
/* modes */
#define AUTO_NET_SMII_MODE (1 << 0)
#define AUTO_NET_MII_MODE (1 << 1)
#define AUTO_EXP_MODE (1 << 2)
#define SMALL_PRINTERS_MODE (1 << 3)
#define EXTENDED_MODE (1 << 4)
static struct spear_pmx_mode pmx_mode_auto_net_smii = {
.name = "Automation Networking SMII mode",
.mode = AUTO_NET_SMII_MODE,
.reg = MODE_CONFIG_REG,
.mask = 0x00000007,
.val = 0x0,
};
static struct spear_pmx_mode pmx_mode_auto_net_mii = {
.name = "Automation Networking MII mode",
.mode = AUTO_NET_MII_MODE,
.reg = MODE_CONFIG_REG,
.mask = 0x00000007,
.val = 0x1,
};
static struct spear_pmx_mode pmx_mode_auto_exp = {
.name = "Automation Expanded mode",
.mode = AUTO_EXP_MODE,
.reg = MODE_CONFIG_REG,
.mask = 0x00000007,
.val = 0x2,
};
static struct spear_pmx_mode pmx_mode_small_printers = {
.name = "Small Printers mode",
.mode = SMALL_PRINTERS_MODE,
.reg = MODE_CONFIG_REG,
.mask = 0x00000007,
.val = 0x3,
};
static struct spear_pmx_mode pmx_mode_extended = {
.name = "extended mode",
.mode = EXTENDED_MODE,
.reg = MODE_EXT_CONFIG_REG,
.mask = 0x00000001,
.val = 0x1,
};
static struct spear_pmx_mode *spear320_pmx_modes[] = {
&pmx_mode_auto_net_smii,
&pmx_mode_auto_net_mii,
&pmx_mode_auto_exp,
&pmx_mode_small_printers,
&pmx_mode_extended,
};
/* Extended mode registers and their offsets */
#define EXT_CTRL_REG 0x0018
#define MII_MDIO_MASK (1 << 4)
#define MII_MDIO_10_11_VAL 0
#define MII_MDIO_81_VAL (1 << 4)
#define EMI_FSMC_DYNAMIC_MUX_MASK (1 << 5)
#define MAC_MODE_MII 0
#define MAC_MODE_RMII 1
#define MAC_MODE_SMII 2
#define MAC_MODE_SS_SMII 3
#define MAC_MODE_MASK 0x3
#define MAC1_MODE_SHIFT 16
#define MAC2_MODE_SHIFT 18
#define IP_SEL_PAD_0_9_REG 0x00A4
#define PMX_PL_0_1_MASK (0x3F << 0)
#define PMX_UART2_PL_0_1_VAL 0x0
#define PMX_I2C2_PL_0_1_VAL (0x4 | (0x4 << 3))
#define PMX_PL_2_3_MASK (0x3F << 6)
#define PMX_I2C2_PL_2_3_VAL 0x0
#define PMX_UART6_PL_2_3_VAL ((0x1 << 6) | (0x1 << 9))
Annotation
- Immediate include surface: `linux/err.h`, `linux/init.h`, `linux/mod_devicetable.h`, `linux/platform_device.h`, `pinctrl-spear3xx.h`.
- Detected declarations: `function spear320_pinctrl_probe`, `function spear320_pinctrl_init`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.