drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/starfive/pinctrl-starfive-jh7110-aon.c
Extension
.c
Size
5212 bytes
Lines
177
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Pinctrl / GPIO driver for StarFive JH7110 SoC aon controller
 *
 * Copyright (C) 2022 StarFive Technology Co., Ltd.
 */

#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>

#include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>

#include "../core.h"
#include "../pinconf.h"
#include "../pinmux.h"
#include "pinctrl-starfive-jh7110.h"

#define JH7110_AON_NGPIO		4

#define JH7110_AON_REGS_NUM		37

/* registers */
#define JH7110_AON_DOEN			0x0
#define JH7110_AON_DOUT			0x4
#define JH7110_AON_GPI			0x8
#define JH7110_AON_GPIOIN		0x2c

#define JH7110_AON_GPIOEN		0xc
#define JH7110_AON_GPIOIS		0x10
#define JH7110_AON_GPIOIC		0x14
#define JH7110_AON_GPIOIBE		0x18
#define JH7110_AON_GPIOIEV		0x1c
#define JH7110_AON_GPIOIE		0x20
#define JH7110_AON_GPIORIS		0x28
#define JH7110_AON_GPIOMIS		0x28

#define JH7110_AON_GPO_PDA_0_5_CFG	0x30

static const struct pinctrl_pin_desc jh7110_aon_pins[] = {
	PINCTRL_PIN(PAD_TESTEN,		"TESTEN"),
	PINCTRL_PIN(PAD_RGPIO0,		"RGPIO0"),
	PINCTRL_PIN(PAD_RGPIO1,		"RGPIO1"),
	PINCTRL_PIN(PAD_RGPIO2,		"RGPIO2"),
	PINCTRL_PIN(PAD_RGPIO3,		"RGPIO3"),
	PINCTRL_PIN(PAD_RSTN,		"RSTN"),
	PINCTRL_PIN(PAD_GMAC0_MDC,	"GMAC0_MDC"),
	PINCTRL_PIN(PAD_GMAC0_MDIO,	"GMAC0_MDIO"),
	PINCTRL_PIN(PAD_GMAC0_RXD0,	"GMAC0_RXD0"),
	PINCTRL_PIN(PAD_GMAC0_RXD1,	"GMAC0_RXD1"),
	PINCTRL_PIN(PAD_GMAC0_RXD2,	"GMAC0_RXD2"),
	PINCTRL_PIN(PAD_GMAC0_RXD3,	"GMAC0_RXD3"),
	PINCTRL_PIN(PAD_GMAC0_RXDV,	"GMAC0_RXDV"),
	PINCTRL_PIN(PAD_GMAC0_RXC,	"GMAC0_RXC"),
	PINCTRL_PIN(PAD_GMAC0_TXD0,	"GMAC0_TXD0"),
	PINCTRL_PIN(PAD_GMAC0_TXD1,	"GMAC0_TXD1"),
	PINCTRL_PIN(PAD_GMAC0_TXD2,	"GMAC0_TXD2"),
	PINCTRL_PIN(PAD_GMAC0_TXD3,	"GMAC0_TXD3"),
	PINCTRL_PIN(PAD_GMAC0_TXEN,	"GMAC0_TXEN"),
	PINCTRL_PIN(PAD_GMAC0_TXC,	"GMAC0_TXC"),
};

static int jh7110_aon_set_one_pin_mux(struct jh7110_pinctrl *sfp,
				      unsigned int pin,
				      unsigned int din, u32 dout,
				      u32 doen, u32 func)
{
	if (pin < sfp->gc.ngpio && func == 0)
		jh7110_set_gpiomux(sfp, pin, din, dout, doen);

	return 0;
}

static int jh7110_aon_get_padcfg_base(struct jh7110_pinctrl *sfp,
				      unsigned int pin)
{
	if (pin < PAD_GMAC0_MDC)
		return JH7110_AON_GPO_PDA_0_5_CFG;

Annotation

Implementation Notes