drivers/pinctrl/sunplus/Kconfig

Source file repositories/reference/linux-study-clean/drivers/pinctrl/sunplus/Kconfig

File Facts

System: Linux kernel
Corpus path: drivers/pinctrl/sunplus/Kconfig
Extension: [no extension]
Size: 587 bytes
Lines: 22
Domain: Driver Families
Bucket: drivers/pinctrl
Inferred role: Driver Families: build/configuration rule
Status: atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
#
# Sunplus Pin control driver configuration
#

config PINCTRL_SPPCTL
	tristate "Sunplus SP7021 PinMux and GPIO driver"
	depends on SOC_SP7021
	depends on OF && HAS_IOMEM
	select GENERIC_PINCTRL_GROUPS
	select GENERIC_PINMUX_FUNCTIONS
	select GENERIC_PINCONF
	select PINCONF
	select PINMUX
	select GPIOLIB
	help
	  Say Y here to support Sunplus SP7021 pinmux controller.
	  This driver requires the pinctrl framework.
	  GPIO is provided by the same driver.
	  To compile this driver as a module, choose M here.
	  The module will be called sppinctrl.

Annotation

Atlas domain: Driver Families / drivers/pinctrl.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.