drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c

File Facts

System: Linux kernel
Corpus path: drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
Extension: .c
Size: 22111 bytes
Lines: 582
Domain: Driver Families
Bucket: drivers/pinctrl
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/module.h
linux/platform_device.h
linux/of.h
linux/pinctrl/pinctrl.h
pinctrl-sunxi.h

Detected Declarations

function sun8i_v3s_pinctrl_probe

Annotated Snippet

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-sunxi.h"

#define PINCTRL_SUN8I_V3	BIT(0)
#define PINCTRL_SUN8I_V3S	BIT(1)

static const struct sunxi_desc_pin sun8i_v3s_pins[] = {
	/* Hole */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "uart2"),		/* TX */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PB_EINT0 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "uart2"),		/* RX */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PB_EINT1 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "uart2"),		/* RTS */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PB_EINT2 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "uart2"),		/* CTS */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PB_EINT3 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "pwm0"),
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PB_EINT4 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "pwm1"),
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PB_EINT5 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SCK */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PB_EINT6 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SDA */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PB_EINT7 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SDA */
		  SUNXI_FUNCTION(0x3, "uart0"),		/* TX */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PB_EINT8 */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
		  SUNXI_FUNCTION(0x0, "gpio_in"),
		  SUNXI_FUNCTION(0x1, "gpio_out"),
		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SCK */
		  SUNXI_FUNCTION(0x3, "uart0"),		/* RX */
		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PB_EINT9 */
	SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 10),
			  PINCTRL_SUN8I_V3,
			  SUNXI_FUNCTION(0x0, "gpio_in"),
			  SUNXI_FUNCTION(0x1, "gpio_out"),
			  SUNXI_FUNCTION(0x2, "jtag"),		/* MS */
			  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PB_EINT10 */
	SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11),
			  PINCTRL_SUN8I_V3,
			  SUNXI_FUNCTION(0x0, "gpio_in"),
			  SUNXI_FUNCTION(0x1, "gpio_out"),
			  SUNXI_FUNCTION(0x2, "jtag"),		/* CK */
			  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PB_EINT11 */
	SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12),
			  PINCTRL_SUN8I_V3,
			  SUNXI_FUNCTION(0x0, "gpio_in"),
			  SUNXI_FUNCTION(0x1, "gpio_out"),
			  SUNXI_FUNCTION(0x2, "jtag"),		/* DO */
			  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/* PB_EINT12 */
	SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13),
			  PINCTRL_SUN8I_V3,
			  SUNXI_FUNCTION(0x0, "gpio_in"),
			  SUNXI_FUNCTION(0x1, "gpio_out"),
			  SUNXI_FUNCTION(0x2, "jtag"),		/* DI */
			  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)),	/* PB_EINT13 */
	/* Hole */
	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),

Annotation

Immediate include surface: `linux/module.h`, `linux/platform_device.h`, `linux/of.h`, `linux/pinctrl/pinctrl.h`, `pinctrl-sunxi.h`.
Detected declarations: `function sun8i_v3s_pinctrl_probe`.
Atlas domain: Driver Families / drivers/pinctrl.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.