drivers/pinctrl/tegra/pinctrl-tegra-xusb.c
Source file repositories/reference/linux-study-clean/drivers/pinctrl/tegra/pinctrl-tegra-xusb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/tegra/pinctrl-tegra-xusb.c- Extension
.c- Size
- 24954 bytes
- Lines
- 967
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/io.hlinux/module.hlinux/of.hlinux/phy/phy.hlinux/platform_device.hlinux/reset.hlinux/seq_file.hlinux/slab.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinctrl.hlinux/pinctrl/pinmux.hdt-bindings/pinctrl/pinctrl-tegra-xusb.h../core.h../pinctrl-utils.h
Detected Declarations
struct tegra_xusb_padctl_functionstruct tegra_xusb_padctl_socstruct tegra_xusb_padctl_lanestruct tegra_xusb_padctlenum tegra_xusb_padctl_paramenum tegra124_functionfunction padctl_writelfunction padctl_readlfunction tegra_xusb_padctl_get_groups_countfunction tegra_xusb_padctl_get_group_pinsfunction tegra_xusb_padctl_parse_subnodefunction of_property_for_each_stringfunction tegra_xusb_padctl_dt_node_to_mapfunction for_each_child_of_node_scopedfunction tegra_xusb_padctl_get_functions_countfunction tegra_xusb_padctl_get_function_namefunction tegra_xusb_padctl_get_function_groupsfunction tegra_xusb_padctl_pinmux_setfunction tegra_xusb_padctl_pinconf_group_getfunction tegra_xusb_padctl_pinconf_group_setfunction tegra_xusb_padctl_pinconf_group_dbg_showfunction tegra_xusb_padctl_pinconf_config_dbg_showfunction tegra_xusb_padctl_enablefunction tegra_xusb_padctl_disablefunction tegra_xusb_phy_initfunction tegra_xusb_phy_exitfunction pcie_phy_power_onfunction pcie_phy_power_offfunction sata_phy_power_onfunction sata_phy_power_offfunction tegra_xusb_padctl_legacy_probefunction tegra_xusb_padctl_legacy_removeexport tegra_xusb_padctl_legacy_probeexport tegra_xusb_padctl_legacy_remove
Annotated Snippet
struct tegra_xusb_padctl_function {
const char *name;
const char * const *groups;
unsigned int num_groups;
};
struct tegra_xusb_padctl_soc {
const struct pinctrl_pin_desc *pins;
unsigned int num_pins;
const struct tegra_xusb_padctl_function *functions;
unsigned int num_functions;
const struct tegra_xusb_padctl_lane *lanes;
unsigned int num_lanes;
};
struct tegra_xusb_padctl_lane {
const char *name;
unsigned int offset;
unsigned int shift;
unsigned int mask;
unsigned int iddq;
const unsigned int *funcs;
unsigned int num_funcs;
};
struct tegra_xusb_padctl {
struct device *dev;
void __iomem *regs;
struct mutex lock;
struct reset_control *rst;
const struct tegra_xusb_padctl_soc *soc;
struct pinctrl_dev *pinctrl;
struct pinctrl_desc desc;
struct phy_provider *provider;
struct phy *phys[2];
unsigned int enable;
};
static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
unsigned long offset)
{
writel(value, padctl->regs + offset);
}
static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
unsigned long offset)
{
return readl(padctl->regs + offset);
}
static int tegra_xusb_padctl_get_groups_count(struct pinctrl_dev *pinctrl)
{
struct tegra_xusb_padctl *padctl = pinctrl_dev_get_drvdata(pinctrl);
return padctl->soc->num_pins;
}
static const char *tegra_xusb_padctl_get_group_name(struct pinctrl_dev *pinctrl,
unsigned int group)
{
struct tegra_xusb_padctl *padctl = pinctrl_dev_get_drvdata(pinctrl);
return padctl->soc->pins[group].name;
}
static int tegra_xusb_padctl_get_group_pins(struct pinctrl_dev *pinctrl,
unsigned group,
const unsigned **pins,
unsigned *num_pins)
{
/*
* For the tegra-xusb pad controller groups are synonymous
* with lanes/pins and there is always one lane/pin per group.
*/
*pins = &pinctrl->desc->pins[group].number;
*num_pins = 1;
return 0;
}
enum tegra_xusb_padctl_param {
TEGRA_XUSB_PADCTL_IDDQ,
};
Annotation
- Immediate include surface: `linux/delay.h`, `linux/io.h`, `linux/module.h`, `linux/of.h`, `linux/phy/phy.h`, `linux/platform_device.h`, `linux/reset.h`, `linux/seq_file.h`.
- Detected declarations: `struct tegra_xusb_padctl_function`, `struct tegra_xusb_padctl_soc`, `struct tegra_xusb_padctl_lane`, `struct tegra_xusb_padctl`, `enum tegra_xusb_padctl_param`, `enum tegra124_function`, `function padctl_writel`, `function padctl_readl`, `function tegra_xusb_padctl_get_groups_count`, `function tegra_xusb_padctl_get_group_pins`.
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.