drivers/pinctrl/tegra/pinctrl-tegra114.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/tegra/pinctrl-tegra114.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/tegra/pinctrl-tegra114.c
Extension
.c
Size
65601 bytes
Lines
1866
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Pinctrl data for the NVIDIA Tegra114 pinmux
 *
 * Author: Pritesh Raithatha <praithatha@nvidia.com>
 *
 * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
 */

#include <linux/init.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include "pinctrl-tegra.h"

/*
 * Most pins affected by the pinmux can also be GPIOs. Define these first.
 * These must match how the GPIO driver names/numbers its pins.
 */
#define _GPIO(offset)				(offset)

#define TEGRA_PIN_CLK_32K_OUT_PA0		_GPIO(0)
#define TEGRA_PIN_UART3_CTS_N_PA1		_GPIO(1)
#define TEGRA_PIN_DAP2_FS_PA2			_GPIO(2)
#define TEGRA_PIN_DAP2_SCLK_PA3			_GPIO(3)
#define TEGRA_PIN_DAP2_DIN_PA4			_GPIO(4)
#define TEGRA_PIN_DAP2_DOUT_PA5			_GPIO(5)
#define TEGRA_PIN_SDMMC3_CLK_PA6		_GPIO(6)
#define TEGRA_PIN_SDMMC3_CMD_PA7		_GPIO(7)
#define TEGRA_PIN_GMI_A17_PB0			_GPIO(8)
#define TEGRA_PIN_GMI_A18_PB1			_GPIO(9)
#define TEGRA_PIN_SDMMC3_DAT3_PB4		_GPIO(12)
#define TEGRA_PIN_SDMMC3_DAT2_PB5		_GPIO(13)
#define TEGRA_PIN_SDMMC3_DAT1_PB6		_GPIO(14)
#define TEGRA_PIN_SDMMC3_DAT0_PB7		_GPIO(15)
#define TEGRA_PIN_UART3_RTS_N_PC0		_GPIO(16)
#define TEGRA_PIN_UART2_TXD_PC2			_GPIO(18)
#define TEGRA_PIN_UART2_RXD_PC3			_GPIO(19)
#define TEGRA_PIN_GEN1_I2C_SCL_PC4		_GPIO(20)
#define TEGRA_PIN_GEN1_I2C_SDA_PC5		_GPIO(21)
#define TEGRA_PIN_GMI_WP_N_PC7			_GPIO(23)
#define TEGRA_PIN_GMI_AD0_PG0			_GPIO(48)
#define TEGRA_PIN_GMI_AD1_PG1			_GPIO(49)
#define TEGRA_PIN_GMI_AD2_PG2			_GPIO(50)
#define TEGRA_PIN_GMI_AD3_PG3			_GPIO(51)
#define TEGRA_PIN_GMI_AD4_PG4			_GPIO(52)
#define TEGRA_PIN_GMI_AD5_PG5			_GPIO(53)
#define TEGRA_PIN_GMI_AD6_PG6			_GPIO(54)
#define TEGRA_PIN_GMI_AD7_PG7			_GPIO(55)
#define TEGRA_PIN_GMI_AD8_PH0			_GPIO(56)
#define TEGRA_PIN_GMI_AD9_PH1			_GPIO(57)
#define TEGRA_PIN_GMI_AD10_PH2			_GPIO(58)
#define TEGRA_PIN_GMI_AD11_PH3			_GPIO(59)
#define TEGRA_PIN_GMI_AD12_PH4			_GPIO(60)
#define TEGRA_PIN_GMI_AD13_PH5			_GPIO(61)
#define TEGRA_PIN_GMI_AD14_PH6			_GPIO(62)
#define TEGRA_PIN_GMI_AD15_PH7			_GPIO(63)
#define TEGRA_PIN_GMI_WR_N_PI0			_GPIO(64)
#define TEGRA_PIN_GMI_OE_N_PI1			_GPIO(65)
#define TEGRA_PIN_GMI_CS6_N_PI3			_GPIO(67)
#define TEGRA_PIN_GMI_RST_N_PI4			_GPIO(68)
#define TEGRA_PIN_GMI_IORDY_PI5			_GPIO(69)
#define TEGRA_PIN_GMI_CS7_N_PI6			_GPIO(70)
#define TEGRA_PIN_GMI_WAIT_PI7			_GPIO(71)
#define TEGRA_PIN_GMI_CS0_N_PJ0			_GPIO(72)
#define TEGRA_PIN_GMI_CS1_N_PJ2			_GPIO(74)
#define TEGRA_PIN_GMI_DQS_P_PJ3			_GPIO(75)
#define TEGRA_PIN_UART2_CTS_N_PJ5		_GPIO(77)
#define TEGRA_PIN_UART2_RTS_N_PJ6		_GPIO(78)
#define TEGRA_PIN_GMI_A16_PJ7			_GPIO(79)
#define TEGRA_PIN_GMI_ADV_N_PK0			_GPIO(80)
#define TEGRA_PIN_GMI_CLK_PK1			_GPIO(81)
#define TEGRA_PIN_GMI_CS4_N_PK2			_GPIO(82)
#define TEGRA_PIN_GMI_CS2_N_PK3			_GPIO(83)
#define TEGRA_PIN_GMI_CS3_N_PK4			_GPIO(84)
#define TEGRA_PIN_SPDIF_OUT_PK5			_GPIO(85)
#define TEGRA_PIN_SPDIF_IN_PK6			_GPIO(86)
#define TEGRA_PIN_GMI_A19_PK7			_GPIO(87)
#define TEGRA_PIN_DAP1_FS_PN0			_GPIO(104)
#define TEGRA_PIN_DAP1_DIN_PN1			_GPIO(105)
#define TEGRA_PIN_DAP1_DOUT_PN2			_GPIO(106)
#define TEGRA_PIN_DAP1_SCLK_PN3			_GPIO(107)
#define TEGRA_PIN_USB_VBUS_EN0_PN4		_GPIO(108)
#define TEGRA_PIN_USB_VBUS_EN1_PN5		_GPIO(109)
#define TEGRA_PIN_HDMI_INT_PN7			_GPIO(111)
#define TEGRA_PIN_ULPI_DATA7_PO0		_GPIO(112)
#define TEGRA_PIN_ULPI_DATA0_PO1		_GPIO(113)
#define TEGRA_PIN_ULPI_DATA1_PO2		_GPIO(114)

Annotation

Implementation Notes