drivers/pinctrl/tegra/pinctrl-tegra210.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/tegra/pinctrl-tegra210.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/tegra/pinctrl-tegra210.c
Extension
.c
Size
66787 bytes
Lines
1583
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Pinctrl data for the NVIDIA Tegra210 pinmux
 *
 * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
 */

#include <linux/init.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>

#include "pinctrl-tegra.h"

/*
 * Most pins affected by the pinmux can also be GPIOs. Define these first.
 * These must match how the GPIO driver names/numbers its pins.
 */
#define _GPIO(offset)				(offset)

#define TEGRA_PIN_PEX_L0_RST_N_PA0		_GPIO(0)
#define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1		_GPIO(1)
#define TEGRA_PIN_PEX_WAKE_N_PA2		_GPIO(2)
#define TEGRA_PIN_PEX_L1_RST_N_PA3		_GPIO(3)
#define TEGRA_PIN_PEX_L1_CLKREQ_N_PA4		_GPIO(4)
#define TEGRA_PIN_SATA_LED_ACTIVE_PA5		_GPIO(5)
#define TEGRA_PIN_PA6				_GPIO(6)
#define TEGRA_PIN_DAP1_FS_PB0			_GPIO(8)
#define TEGRA_PIN_DAP1_DIN_PB1			_GPIO(9)
#define TEGRA_PIN_DAP1_DOUT_PB2			_GPIO(10)
#define TEGRA_PIN_DAP1_SCLK_PB3			_GPIO(11)
#define TEGRA_PIN_SPI2_MOSI_PB4			_GPIO(12)
#define TEGRA_PIN_SPI2_MISO_PB5			_GPIO(13)
#define TEGRA_PIN_SPI2_SCK_PB6			_GPIO(14)
#define TEGRA_PIN_SPI2_CS0_PB7			_GPIO(15)
#define TEGRA_PIN_SPI1_MOSI_PC0			_GPIO(16)
#define TEGRA_PIN_SPI1_MISO_PC1			_GPIO(17)
#define TEGRA_PIN_SPI1_SCK_PC2			_GPIO(18)
#define TEGRA_PIN_SPI1_CS0_PC3			_GPIO(19)
#define TEGRA_PIN_SPI1_CS1_PC4			_GPIO(20)
#define TEGRA_PIN_SPI4_SCK_PC5			_GPIO(21)
#define TEGRA_PIN_SPI4_CS0_PC6			_GPIO(22)
#define TEGRA_PIN_SPI4_MOSI_PC7			_GPIO(23)
#define TEGRA_PIN_SPI4_MISO_PD0			_GPIO(24)
#define TEGRA_PIN_UART3_TX_PD1			_GPIO(25)
#define TEGRA_PIN_UART3_RX_PD2			_GPIO(26)
#define TEGRA_PIN_UART3_RTS_PD3			_GPIO(27)
#define TEGRA_PIN_UART3_CTS_PD4			_GPIO(28)
#define TEGRA_PIN_DMIC1_CLK_PE0			_GPIO(32)
#define TEGRA_PIN_DMIC1_DAT_PE1			_GPIO(33)
#define TEGRA_PIN_DMIC2_CLK_PE2			_GPIO(34)
#define TEGRA_PIN_DMIC2_DAT_PE3			_GPIO(35)
#define TEGRA_PIN_DMIC3_CLK_PE4			_GPIO(36)
#define TEGRA_PIN_DMIC3_DAT_PE5			_GPIO(37)
#define TEGRA_PIN_PE6				_GPIO(38)
#define TEGRA_PIN_PE7				_GPIO(39)
#define TEGRA_PIN_GEN3_I2C_SCL_PF0		_GPIO(40)
#define TEGRA_PIN_GEN3_I2C_SDA_PF1		_GPIO(41)
#define TEGRA_PIN_UART2_TX_PG0			_GPIO(48)
#define TEGRA_PIN_UART2_RX_PG1			_GPIO(49)
#define TEGRA_PIN_UART2_RTS_PG2			_GPIO(50)
#define TEGRA_PIN_UART2_CTS_PG3			_GPIO(51)
#define TEGRA_PIN_WIFI_EN_PH0			_GPIO(56)
#define TEGRA_PIN_WIFI_RST_PH1			_GPIO(57)
#define TEGRA_PIN_WIFI_WAKE_AP_PH2		_GPIO(58)
#define TEGRA_PIN_AP_WAKE_BT_PH3		_GPIO(59)
#define TEGRA_PIN_BT_RST_PH4			_GPIO(60)
#define TEGRA_PIN_BT_WAKE_AP_PH5		_GPIO(61)
#define TEGRA_PIN_PH6				_GPIO(62)
#define TEGRA_PIN_AP_WAKE_NFC_PH7		_GPIO(63)
#define TEGRA_PIN_NFC_EN_PI0			_GPIO(64)
#define TEGRA_PIN_NFC_INT_PI1			_GPIO(65)
#define TEGRA_PIN_GPS_EN_PI2			_GPIO(66)
#define TEGRA_PIN_GPS_RST_PI3			_GPIO(67)
#define TEGRA_PIN_UART4_TX_PI4			_GPIO(68)
#define TEGRA_PIN_UART4_RX_PI5			_GPIO(69)
#define TEGRA_PIN_UART4_RTS_PI6			_GPIO(70)
#define TEGRA_PIN_UART4_CTS_PI7			_GPIO(71)
#define TEGRA_PIN_GEN1_I2C_SDA_PJ0		_GPIO(72)
#define TEGRA_PIN_GEN1_I2C_SCL_PJ1		_GPIO(73)
#define TEGRA_PIN_GEN2_I2C_SCL_PJ2		_GPIO(74)
#define TEGRA_PIN_GEN2_I2C_SDA_PJ3		_GPIO(75)
#define TEGRA_PIN_DAP4_FS_PJ4			_GPIO(76)
#define TEGRA_PIN_DAP4_DIN_PJ5			_GPIO(77)
#define TEGRA_PIN_DAP4_DOUT_PJ6			_GPIO(78)
#define TEGRA_PIN_DAP4_SCLK_PJ7			_GPIO(79)
#define TEGRA_PIN_PK0				_GPIO(80)
#define TEGRA_PIN_PK1				_GPIO(81)
#define TEGRA_PIN_PK2				_GPIO(82)

Annotation

Implementation Notes