drivers/pinctrl/ultrarisc/Kconfig
Source file repositories/reference/linux-study-clean/drivers/pinctrl/ultrarisc/Kconfig
File Facts
- System
- Linux kernel
- Corpus path
drivers/pinctrl/ultrarisc/Kconfig- Extension
[no extension]- Size
- 587 bytes
- Lines
- 21
- Domain
- Driver Families
- Bucket
- drivers/pinctrl
- Inferred role
- Driver Families: build/configuration rule
- Status
- atlas-only
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only
config PINCTRL_ULTRARISC
tristate
depends on OF
depends on ARCH_ULTRARISC || COMPILE_TEST
select GENERIC_PINCTRL
select PINMUX
config PINCTRL_ULTRARISC_DP1000
tristate "UltraRISC DP1000 SoC Pinctrl driver"
select PINCTRL_ULTRARISC
depends on OF && HAS_IOMEM
depends on ARCH_ULTRARISC || COMPILE_TEST
default ARCH_ULTRARISC
help
Say Y to select the pinctrl driver for UltraRISC DP1000 SoC.
This pin controller allows selecting the mux function for
each pin. This driver can also be built as a module called
pinctrl-dp1000.Annotation
- Atlas domain: Driver Families / drivers/pinctrl.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.