drivers/pinctrl/ultrarisc/pinctrl-dp1000.c

Source file repositories/reference/linux-study-clean/drivers/pinctrl/ultrarisc/pinctrl-dp1000.c

File Facts

System
Linux kernel
Corpus path
drivers/pinctrl/ultrarisc/pinctrl-dp1000.c
Extension
.c
Size
6373 bytes
Lines
169
Domain
Driver Families
Bucket
drivers/pinctrl
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd.
 *
 * Author: Jia Wang <wangjia@ultrarisc.com>
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-ultrarisc.h"

/* Port indices. */
#define UR_DP1000_PORT_A_IDX		0
#define UR_DP1000_PORT_B_IDX		1
#define UR_DP1000_PORT_C_IDX		2
#define UR_DP1000_PORT_D_IDX		3
#define UR_DP1000_PORT_LPC_IDX		4

/* Port mux register offsets. */
#define UR_DP1000_PORTA_FUNC_OFFSET	0x2c0
#define UR_DP1000_PORTB_FUNC_OFFSET	0x2c4
#define UR_DP1000_PORTC_FUNC_OFFSET	0x2c8
#define UR_DP1000_PORTD_FUNC_OFFSET	0x2cc
#define UR_DP1000_PORTLPC_FUNC_OFFSET	0x2d0

/* Port pinconf register offsets. */
#define UR_DP1000_PORTA_CONF_OFFSET	0x310
#define UR_DP1000_PORTB_CONF_OFFSET	0x318
#define UR_DP1000_PORTC_CONF_OFFSET	0x31c
#define UR_DP1000_PORTD_CONF_OFFSET	0x320
#define UR_DP1000_PORTLPC_CONF_OFFSET	0x324

/* Pin ranges for function descriptors. */
#define UR_DP1000_PINS_ABCD	GENMASK_ULL(39, 0)
#define UR_DP1000_PINS_LPC	GENMASK_ULL(52, 40)

/* Static table entry helpers. */
#define UR_DP1000_PORT(_base, _npins, _func, _conf, _modes, _gpio) \
	{ .pin_base = (_base), .npins = (_npins), .func_offset = (_func), \
	  .conf_offset = (_conf), .supported_modes = (_modes), \
	  .supports_gpio = (_gpio) }

#define UR_DP1000_PIN(_nr, _name, _port) \
	{ .number = (_nr), .name = (_name), .drv_data = (void *)&ur_dp1000_ports[_port] }

static const struct ur_func_route ur_dp1000_routes[] = {
	{ "gpio", UR_FUNC_DEFAULT, UR_DP1000_PINS_ABCD },
	{ "i2c", UR_FUNC_0, GENMASK_ULL(13, 12) },
	{ "i2c", UR_FUNC_0, GENMASK_ULL(23, 22) },
	{ "i2c", UR_FUNC_0, GENMASK_ULL(25, 24) },
	{ "i2c", UR_FUNC_0, GENMASK_ULL(27, 26) },
	{ "pwm", UR_FUNC_0, GENMASK_ULL(19, 16) },
	{ "spi", UR_FUNC_1, GENMASK_ULL(39, 32) },
	{ "spi", UR_FUNC_0, GENMASK_ULL(6, 0) },
	{ "uart", UR_FUNC_1, GENMASK_ULL(9, 8) },
	{ "uart", UR_FUNC_0, GENMASK_ULL(21, 20) },
	{ "uart", UR_FUNC_0, GENMASK_ULL(29, 28) },
	{ "uart", UR_FUNC_0, GENMASK_ULL(31, 30) },
	{ "lpc", UR_FUNC_DEFAULT, UR_DP1000_PINS_LPC },
	{ "espi", UR_FUNC_0, UR_DP1000_PINS_LPC },
};

static const struct ur_port_desc ur_dp1000_ports[] = {
	UR_DP1000_PORT(0, 16, UR_DP1000_PORTA_FUNC_OFFSET,
		       UR_DP1000_PORTA_CONF_OFFSET,
		       UR_FUNC_0 | UR_FUNC_1, true),
	UR_DP1000_PORT(16, 8, UR_DP1000_PORTB_FUNC_OFFSET,
		       UR_DP1000_PORTB_CONF_OFFSET,
		       UR_FUNC_0 | UR_FUNC_1, true),
	UR_DP1000_PORT(24, 8, UR_DP1000_PORTC_FUNC_OFFSET,
		       UR_DP1000_PORTC_CONF_OFFSET,
		       UR_FUNC_0 | UR_FUNC_1, true),
	UR_DP1000_PORT(32, 8, UR_DP1000_PORTD_FUNC_OFFSET,
		       UR_DP1000_PORTD_CONF_OFFSET,
		       UR_FUNC_0 | UR_FUNC_1, true),
	UR_DP1000_PORT(40, 13, UR_DP1000_PORTLPC_FUNC_OFFSET,
		       UR_DP1000_PORTLPC_CONF_OFFSET,
		       UR_FUNC_0,             false),
};

static const struct pinctrl_pin_desc ur_dp1000_pins[] = {
	UR_DP1000_PIN(0, "PA0", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(1, "PA1", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(2, "PA2", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(3, "PA3", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(4, "PA4", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(5, "PA5", UR_DP1000_PORT_A_IDX),
	UR_DP1000_PIN(6, "PA6", UR_DP1000_PORT_A_IDX),

Annotation

Implementation Notes