drivers/platform/mellanox/mlxreg-dpu.c

Source file repositories/reference/linux-study-clean/drivers/platform/mellanox/mlxreg-dpu.c

File Facts

System
Linux kernel
Corpus path
drivers/platform/mellanox/mlxreg-dpu.c
Extension
.c
Size
17029 bytes
Lines
614
Domain
Driver Families
Bucket
drivers/platform
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mlxreg_dpu {
	struct device *dev;
	struct mlxreg_core_data *data;
	struct mlxreg_core_platform_data *io_data;
	struct platform_device *io_regs;
	struct mlxreg_core_hotplug_platform_data *hotplug_data;
	struct platform_device *hotplug;
};

static bool mlxreg_dpu_writeable_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case MLXREG_DPU_REG_PG_EVENT_OFFSET:
	case MLXREG_DPU_REG_PG_MASK_OFFSET:
	case MLXREG_DPU_REG_RESET_GP1_OFFSET:
	case MLXREG_DPU_REG_GP0_OFFSET:
	case MLXREG_DPU_REG_GP1_OFFSET:
	case MLXREG_DPU_REG_GP4_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_MASK_OFFSET:
	case MLXREG_DPU_REG_HEALTH_EVENT_OFFSET:
	case MLXREG_DPU_REG_HEALTH_MASK_OFFSET:
		return true;
	}
	return false;
}

static bool mlxreg_dpu_readable_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case MLXREG_DPU_REG_FPGA1_VER_OFFSET:
	case MLXREG_DPU_REG_FPGA1_PN_OFFSET:
	case MLXREG_DPU_REG_FPGA1_PN1_OFFSET:
	case MLXREG_DPU_REG_PG_OFFSET:
	case MLXREG_DPU_REG_PG_EVENT_OFFSET:
	case MLXREG_DPU_REG_PG_MASK_OFFSET:
	case MLXREG_DPU_REG_RESET_GP1_OFFSET:
	case MLXREG_DPU_REG_RST_CAUSE1_OFFSET:
	case MLXREG_DPU_REG_GP0_RO_OFFSET:
	case MLXREG_DPU_REG_GP0_OFFSET:
	case MLXREG_DPU_REG_GP1_OFFSET:
	case MLXREG_DPU_REG_GP4_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_MASK_OFFSET:
	case MLXREG_DPU_REG_HEALTH_OFFSET:
	case MLXREG_DPU_REG_HEALTH_EVENT_OFFSET:
	case MLXREG_DPU_REG_HEALTH_MASK_OFFSET:
	case MLXREG_DPU_REG_FPGA1_MVER_OFFSET:
	case MLXREG_DPU_REG_CONFIG3_OFFSET:
		return true;
	}
	return false;
}

static bool mlxreg_dpu_volatile_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case MLXREG_DPU_REG_FPGA1_VER_OFFSET:
	case MLXREG_DPU_REG_FPGA1_PN_OFFSET:
	case MLXREG_DPU_REG_FPGA1_PN1_OFFSET:
	case MLXREG_DPU_REG_PG_OFFSET:
	case MLXREG_DPU_REG_PG_EVENT_OFFSET:
	case MLXREG_DPU_REG_PG_MASK_OFFSET:
	case MLXREG_DPU_REG_RESET_GP1_OFFSET:
	case MLXREG_DPU_REG_RST_CAUSE1_OFFSET:
	case MLXREG_DPU_REG_GP0_RO_OFFSET:
	case MLXREG_DPU_REG_GP0_OFFSET:
	case MLXREG_DPU_REG_GP1_OFFSET:
	case MLXREG_DPU_REG_GP4_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_OFFSET:
	case MLXREG_DPU_REG_AGGRCO_MASK_OFFSET:
	case MLXREG_DPU_REG_HEALTH_OFFSET:
	case MLXREG_DPU_REG_HEALTH_EVENT_OFFSET:
	case MLXREG_DPU_REG_HEALTH_MASK_OFFSET:
	case MLXREG_DPU_REG_FPGA1_MVER_OFFSET:
	case MLXREG_DPU_REG_CONFIG3_OFFSET:
		return true;
	}
	return false;
}

/* Configuration for the register map of a device with 2 bytes address space. */
static const struct regmap_config mlxreg_dpu_regmap_conf = {
	.reg_bits = 16,
	.val_bits = 8,
	.max_register = MLXREG_DPU_REG_MAX,
	.cache_type = REGCACHE_FLAT,
	.writeable_reg = mlxreg_dpu_writeable_reg,
	.readable_reg = mlxreg_dpu_readable_reg,
	.volatile_reg = mlxreg_dpu_volatile_reg,

Annotation

Implementation Notes