drivers/platform/x86/intel/pmc/ptl.c

Source file repositories/reference/linux-study-clean/drivers/platform/x86/intel/pmc/ptl.c

File Facts

System
Linux kernel
Corpus path
drivers/platform/x86/intel/pmc/ptl.c
Extension
.c
Size
19246 bytes
Lines
581
Domain
Driver Families
Bucket
drivers/platform
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * This file contains platform specific structure definitions
 * and init function used by Panther Lake PCH.
 *
 * Copyright (c) 2025, Intel Corporation.
 */

#include <linux/pci.h>

#include "core.h"

/* PMC SSRAM PMT Telemetry GUIDS */
#define PCDP_LPM_REQ_GUID 0x47179370

/*
 * Die Mapping to Product.
 * Product PCDDie
 * PTL-H   PCD-H
 * PTL-P   PCD-P
 * PTL-U   PCD-P
 */

static const struct pmc_bit_map ptl_pcdp_pfear_map[] = {
	{"PMC_0",               BIT(0)},
	{"FUSE_OSSE",           BIT(1)},
	{"ESPISPI",             BIT(2)},
	{"XHCI",                BIT(3)},
	{"SPA",                 BIT(4)},
	{"SPB",                 BIT(5)},
	{"MPFPW2",              BIT(6)},
	{"GBE",                 BIT(7)},

	{"SBR16B20",            BIT(0)},
	{"SBR8B20",             BIT(1)},
	{"SBR16B21",            BIT(2)},
	{"DBG_SBR16B",          BIT(3)},
	{"OSSE_HOTHAM",         BIT(4)},
	{"D2D_DISP_1",          BIT(5)},
	{"LPSS",                BIT(6)},
	{"LPC",                 BIT(7)},

	{"SMB",                 BIT(0)},
	{"ISH",                 BIT(1)},
	{"SBR16B2",             BIT(2)},
	{"NPK_0",		BIT(3)},
	{"D2D_NOC_1",           BIT(4)},
	{"SBR8B2",              BIT(5)},
	{"FUSE",                BIT(6)},
	{"SBR16B0",             BIT(7)},

	{"PSF0",		BIT(0)},
	{"XDCI",                BIT(1)},
	{"EXI",                 BIT(2)},
	{"CSE",                 BIT(3)},
	{"KVMCC",		BIT(4)},
	{"PMT",			BIT(5)},
	{"CLINK",		BIT(6)},
	{"PTIO",		BIT(7)},

	{"USBR0",		BIT(0)},
	{"SUSRAM",		BIT(1)},
	{"SMT1",		BIT(2)},
	{"MPFPW1",              BIT(3)},
	{"SMS2",		BIT(4)},
	{"SMS1",		BIT(5)},
	{"CSMERTC",		BIT(6)},
	{"CSMEPSF",		BIT(7)},

	{"D2D_NOC_0",           BIT(0)},
	{"ESE",			BIT(1)},
	{"P2SB8B",              BIT(2)},
	{"SBR16B7",             BIT(3)},
	{"SBR16B3",             BIT(4)},
	{"OSSE_SMT1",           BIT(5)},
	{"D2D_DISP",            BIT(6)},
	{"DBG_SBR",             BIT(7)},

	{"U3FPW1",              BIT(0)},
	{"FIA_X",               BIT(1)},
	{"PSF4",                BIT(2)},
	{"CNVI",                BIT(3)},
	{"UFSX2",               BIT(4)},
	{"ENDBG",               BIT(5)},
	{"DBC",                 BIT(6)},
	{"FIA_PG",              BIT(7)},

	{"D2D_IPU",             BIT(0)},
	{"NPK1",		BIT(1)},
	{"FIACPCB_X",           BIT(2)},

Annotation

Implementation Notes