drivers/pmdomain/mediatek/mtk-pm-domains.c
Source file repositories/reference/linux-study-clean/drivers/pmdomain/mediatek/mtk-pm-domains.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pmdomain/mediatek/mtk-pm-domains.c- Extension
.c- Size
- 36044 bytes
- Lines
- 1299
- Domain
- Driver Families
- Bucket
- drivers/pmdomain
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/arm-smccc.hlinux/clk.hlinux/clk-provider.hlinux/init.hlinux/io.hlinux/iopoll.hlinux/mfd/syscon.hlinux/of.hlinux/of_clk.hlinux/platform_device.hlinux/pm_domain.hlinux/regmap.hlinux/regulator/consumer.hlinux/soc/mediatek/infracfg.hlinux/soc/mediatek/mtk_sip_svc.hmt6735-pm-domains.hmt6795-pm-domains.hmt6893-pm-domains.hmt8167-pm-domains.hmt8173-pm-domains.hmt8183-pm-domains.hmt8186-pm-domains.hmt8188-pm-domains.hmt8189-pm-domains.hmt8192-pm-domains.hmt8195-pm-domains.hmt8196-pm-domains.hmt8365-pm-domains.h
Detected Declarations
struct scpsys_domainstruct scpsysfunction scpsys_domain_is_onfunction scpsys_hwv_domain_is_disable_donefunction scpsys_hwv_domain_is_enable_donefunction scpsys_sec_infra_power_onfunction scpsys_sram_enablefunction scpsys_sram_disablefunction scpsys_bus_protect_clearfunction scpsys_bus_protect_setfunction scpsys_bus_protect_enablefunction scpsys_bus_protect_disablefunction scpsys_regulator_enablefunction scpsys_regulator_disablefunction scpsys_hwv_power_onfunction scpsys_hwv_power_offfunction scpsys_ctl_pwrseq_onfunction scpsys_ctl_pwrseq_offfunction scpsys_modem_pwrseq_onfunction scpsys_modem_pwrseq_offfunction scpsys_power_onfunction platformsfunction scpsys_power_offfunction of_property_for_each_stringfunction scpsys_add_subdomainfunction for_each_child_of_nodefunction scpsys_remove_one_domainfunction scpsys_domain_cleanupfunction scpsys_get_bus_protection_legacyfunction scpsys_get_bus_protectionfunction scpsys_probe
Annotated Snippet
struct scpsys_domain {
struct generic_pm_domain genpd;
const struct scpsys_domain_data *data;
const struct scpsys_hwv_domain_data *hwv_data;
struct scpsys *scpsys;
int num_clks;
struct clk_bulk_data *clks;
int num_subsys_clks;
struct clk_bulk_data *subsys_clks;
struct regulator *supply;
};
struct scpsys {
struct device *dev;
struct regmap *base;
const struct scpsys_soc_data *soc_data;
u8 bus_prot_index[BUS_PROT_BLOCK_COUNT];
struct regmap **bus_prot;
struct genpd_onecell_data pd_data;
struct generic_pm_domain *domains[];
};
#define to_scpsys_domain(gpd) container_of(gpd, struct scpsys_domain, genpd)
static bool scpsys_domain_is_on(struct scpsys_domain *pd)
{
struct scpsys *scpsys = pd->scpsys;
u32 mask = pd->data->sta_mask;
u32 status, status2, mask2;
mask2 = pd->data->sta2nd_mask ? pd->data->sta2nd_mask : mask;
regmap_read(scpsys->base, pd->data->pwr_sta_offs, &status);
status &= mask;
regmap_read(scpsys->base, pd->data->pwr_sta2nd_offs, &status2);
status2 &= mask2;
/* A domain is on when both status bits are set. */
return status && status2;
}
static bool scpsys_hwv_domain_is_disable_done(struct scpsys_domain *pd)
{
const struct scpsys_hwv_domain_data *hwv = pd->hwv_data;
u32 regs[2] = { hwv->done, hwv->clr_sta };
u32 val[2];
u32 mask = BIT(hwv->setclr_bit);
regmap_multi_reg_read(pd->scpsys->base, regs, val, 2);
/* Disable is done when the bit is set in DONE, cleared in CLR_STA */
return (val[0] & mask) && !(val[1] & mask);
}
static bool scpsys_hwv_domain_is_enable_done(struct scpsys_domain *pd)
{
const struct scpsys_hwv_domain_data *hwv = pd->hwv_data;
u32 regs[3] = { hwv->done, hwv->en, hwv->set_sta };
u32 val[3];
u32 mask = BIT(hwv->setclr_bit);
regmap_multi_reg_read(pd->scpsys->base, regs, val, 3);
/* Enable is done when the bit is set in DONE and EN, cleared in SET_STA */
return (val[0] & mask) && (val[1] & mask) && !(val[2] & mask);
}
static int scpsys_sec_infra_power_on(bool on)
{
struct arm_smccc_res res;
unsigned long cmd = on ? 1 : 0;
arm_smccc_smc(MTK_SIP_KERNEL_HWCCF_CONTROL, cmd, 0, 0, 0, 0, 0, 0, &res);
return res.a0;
}
static int scpsys_sram_enable(struct scpsys_domain *pd)
{
u32 expected_ack, pdn_ack = pd->data->sram_pdn_ack_bits;
struct scpsys *scpsys = pd->scpsys;
unsigned int tmp;
int ret;
if (MTK_SCPD_CAPS(pd, MTK_SCPD_SRAM_PDN_INVERTED)) {
regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
expected_ack = pdn_ack;
} else {
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);
expected_ack = 0;
Annotation
- Immediate include surface: `linux/arm-smccc.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/init.h`, `linux/io.h`, `linux/iopoll.h`, `linux/mfd/syscon.h`, `linux/of.h`.
- Detected declarations: `struct scpsys_domain`, `struct scpsys`, `function scpsys_domain_is_on`, `function scpsys_hwv_domain_is_disable_done`, `function scpsys_hwv_domain_is_enable_done`, `function scpsys_sec_infra_power_on`, `function scpsys_sram_enable`, `function scpsys_sram_disable`, `function scpsys_bus_protect_clear`, `function scpsys_bus_protect_set`.
- Atlas domain: Driver Families / drivers/pmdomain.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.