drivers/power/supply/bd71828-power.c

Source file repositories/reference/linux-study-clean/drivers/power/supply/bd71828-power.c

File Facts

System
Linux kernel
Corpus path
drivers/power/supply/bd71828-power.c
Extension
.c
Size
35675 bytes
Lines
1274
Domain
Driver Families
Bucket
drivers/power
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct pwr_regs {
	unsigned int vbat_avg;
	unsigned int ibat;
	unsigned int ibat_avg;
	unsigned int ilim_stat;
	unsigned int btemp_vth;
	unsigned int chg_state;
	unsigned int bat_temp;
	unsigned int dcin_set;
	unsigned int dcin_stat;
	unsigned int dcin_online_mask;
	unsigned int dcin_collapse_limit;
	unsigned int chg_set1;
	unsigned int chg_en;
	unsigned int vbat_alm_limit_u;
	unsigned int conf;
	unsigned int vdcin;
	unsigned int vdcin_himask;
};

static const struct pwr_regs pwr_regs_bd71828 = {
	.vbat_avg = BD71828_REG_VBAT_U,
	.ibat = BD71828_REG_IBAT_U,
	.ibat_avg = BD71828_REG_IBAT_AVG_U,
	.ilim_stat = BD71828_REG_ILIM_STAT,
	.btemp_vth = BD71828_REG_VM_BTMP_U,
	.chg_state = BD71828_REG_CHG_STATE,
	.bat_temp = BD71828_REG_BAT_TEMP,
	.dcin_set = BD71828_REG_DCIN_SET,
	.dcin_stat = BD71828_REG_DCIN_STAT,
	.dcin_online_mask = BD7182x_MASK_DCIN_DET,
	.dcin_collapse_limit = BD71828_REG_DCIN_CLPS,
	.chg_set1 = BD71828_REG_CHG_SET1,
	.chg_en   = BD71828_REG_CHG_EN,
	.vbat_alm_limit_u = BD71828_REG_ALM_VBAT_LIMIT_U,
	.conf = BD71828_REG_CONF,
	.vdcin = BD71828_REG_VDCIN_U,
	.vdcin_himask = BD7182x_MASK_VDCIN_U,
};

static const struct pwr_regs pwr_regs_bd71815 = {
	.vbat_avg = BD71815_REG_VM_SA_VBAT_U,
	/* BD71815 does not have separate current and current avg */
	.ibat = BD71815_REG_CC_CURCD_U,
	.ibat_avg = BD71815_REG_CC_CURCD_U,

	.btemp_vth = BD71815_REG_VM_BTMP,
	.chg_state = BD71815_REG_CHG_STATE,
	.bat_temp = BD71815_REG_BAT_TEMP,
	.dcin_stat = BD71815_REG_DCIN_STAT,
	.dcin_online_mask = BD7182x_MASK_DCIN_DET,
	.dcin_collapse_limit = BD71815_REG_DCIN_CLPS,
	.chg_set1 = BD71815_REG_CHG_SET1,
	.chg_en   = BD71815_REG_CHG_SET1,
	.vbat_alm_limit_u = BD71815_REG_ALM_VBAT_TH_U,
	.conf = BD71815_REG_CONF,

	.vdcin = BD71815_REG_VM_DCIN_U,
	.vdcin_himask = BD7182x_MASK_VDCIN_U,
};

static struct pwr_regs pwr_regs_bd72720 = {
	.vbat_avg = BD72720_REG_VM_SA_VBAT_U,
	.ibat = BD72720_REG_CC_CURCD_U,
	.ibat_avg = BD72720_REG_CC_SA_CURCD_U,
	.btemp_vth = BD72720_REG_VM_BTMP_U,
	/*
	 * Note, state 0x40 IMP_CHK. not documented
	 * on other variants but was still handled in
	 * existing code. No memory traces as to why.
	 */
	.chg_state = BD72720_REG_CHG_STATE,
	.bat_temp = BD72720_REG_CHG_BAT_TEMP_STAT,
	.dcin_stat = BD72720_REG_INT_VBUS_SRC,
	.dcin_online_mask = BD72720_MASK_DCIN_DET,
	.dcin_collapse_limit = -1, /* Automatic. Setting not supported */
	.chg_set1 = BD72720_REG_CHG_SET_1,
	.chg_en = BD72720_REG_CHG_EN,
	/* 15mV note in data-sheet */
	.vbat_alm_limit_u = BD72720_REG_ALM_VBAT_TH_U,
	.conf = BD72720_REG_CONF, /* o XSTB, only PON. Seprate slave addr */
	.vdcin = BD72720_REG_VM_VBUS_U, /* 10 bits not 11 as with other ICs */
	.vdcin_himask = BD72720_MASK_VDCIN_U,
};

struct bd71828_power {
	struct regmap *regmap;
	enum rohm_chip_type chip_type;
	struct device *dev;
	struct power_supply *ac;

Annotation

Implementation Notes