drivers/power/supply/max14656_charger_detector.c
Source file repositories/reference/linux-study-clean/drivers/power/supply/max14656_charger_detector.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/power/supply/max14656_charger_detector.c- Extension
.c- Size
- 8048 bytes
- Lines
- 326
- Domain
- Driver Families
- Bucket
- drivers/power
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/init.hlinux/delay.hlinux/i2c.hlinux/interrupt.hlinux/mod_devicetable.hlinux/slab.hlinux/workqueue.hlinux/power_supply.hlinux/devm-helpers.h
Detected Declarations
struct max14656_chipenum max14656_chg_typefunction max14656_read_regfunction max14656_write_regfunction max14656_read_block_regfunction max14656_irq_workerfunction max14656_irqfunction max14656_hw_initfunction max14656_get_propertyfunction max14656_probe
Annotated Snippet
struct max14656_chip {
struct i2c_client *client;
struct power_supply *detect_psy;
struct power_supply_desc psy_desc;
struct delayed_work irq_work;
int irq;
int online;
};
static int max14656_read_reg(struct i2c_client *client, int reg, u8 *val)
{
s32 ret;
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0) {
dev_err(&client->dev,
"i2c read fail: can't read from %02x: %d\n",
reg, ret);
return ret;
}
*val = ret;
return 0;
}
static int max14656_write_reg(struct i2c_client *client, int reg, u8 val)
{
s32 ret;
ret = i2c_smbus_write_byte_data(client, reg, val);
if (ret < 0) {
dev_err(&client->dev,
"i2c write fail: can't write %02x to %02x: %d\n",
val, reg, ret);
return ret;
}
return 0;
}
static int max14656_read_block_reg(struct i2c_client *client, u8 reg,
u8 length, u8 *val)
{
int ret;
ret = i2c_smbus_read_i2c_block_data(client, reg, length, val);
if (ret < 0) {
dev_err(&client->dev, "failed to block read reg 0x%x: %d\n",
reg, ret);
return ret;
}
return 0;
}
#define REG_TOTAL_NUM 5
static void max14656_irq_worker(struct work_struct *work)
{
struct max14656_chip *chip =
container_of(work, struct max14656_chip, irq_work.work);
u8 buf[REG_TOTAL_NUM];
u8 chg_type;
max14656_read_block_reg(chip->client, MAX14656_DEVICE_ID,
REG_TOTAL_NUM, buf);
if ((buf[MAX14656_STATUS_1] & STATUS1_VB_VALID_MASK) &&
(buf[MAX14656_STATUS_1] & STATUS1_CHG_TYPE_MASK)) {
chg_type = buf[MAX14656_STATUS_1] & STATUS1_CHG_TYPE_MASK;
if (chg_type < MAX14656_CHARGER_LAST)
chip->psy_desc.type = chg_type_props[chg_type].type;
else
chip->psy_desc.type = POWER_SUPPLY_TYPE_UNKNOWN;
chip->online = 1;
} else {
chip->online = 0;
chip->psy_desc.type = POWER_SUPPLY_TYPE_UNKNOWN;
}
power_supply_changed(chip->detect_psy);
}
static irqreturn_t max14656_irq(int irq, void *dev_id)
{
struct max14656_chip *chip = dev_id;
schedule_delayed_work(&chip->irq_work, msecs_to_jiffies(100));
return IRQ_HANDLED;
}
Annotation
- Immediate include surface: `linux/module.h`, `linux/init.h`, `linux/delay.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/mod_devicetable.h`, `linux/slab.h`, `linux/workqueue.h`.
- Detected declarations: `struct max14656_chip`, `enum max14656_chg_type`, `function max14656_read_reg`, `function max14656_write_reg`, `function max14656_read_block_reg`, `function max14656_irq_worker`, `function max14656_irq`, `function max14656_hw_init`, `function max14656_get_property`, `function max14656_probe`.
- Atlas domain: Driver Families / drivers/power.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.