drivers/pwm/pwm-apple.c

Source file repositories/reference/linux-study-clean/drivers/pwm/pwm-apple.c

File Facts

System
Linux kernel
Corpus path
drivers/pwm/pwm-apple.c
Extension
.c
Size
4367 bytes
Lines
160
Domain
Driver Families
Bucket
drivers/pwm
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct apple_pwm {
	void __iomem *base;
	u64 clkrate;
};

static inline struct apple_pwm *to_apple_pwm(struct pwm_chip *chip)
{
	return pwmchip_get_drvdata(chip);
}

static int apple_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			   const struct pwm_state *state)
{
	struct apple_pwm *fpwm;

	if (state->polarity == PWM_POLARITY_INVERSED)
		return -EINVAL;

	fpwm = to_apple_pwm(chip);
	if (state->enabled) {
		u64 on_cycles, off_cycles;

		on_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
						state->duty_cycle, NSEC_PER_SEC);
		if (on_cycles > 0xFFFFFFFF)
			on_cycles = 0xFFFFFFFF;

		off_cycles = mul_u64_u64_div_u64(fpwm->clkrate,
						 state->period, NSEC_PER_SEC) - on_cycles;
		if (off_cycles > 0xFFFFFFFF)
			off_cycles = 0xFFFFFFFF;

		writel(on_cycles, fpwm->base + APPLE_PWM_ON_CYCLES);
		writel(off_cycles, fpwm->base + APPLE_PWM_OFF_CYCLES);
		writel(APPLE_PWM_CTRL_ENABLE | APPLE_PWM_CTRL_OUTPUT_ENABLE | APPLE_PWM_CTRL_UPDATE,
		       fpwm->base + APPLE_PWM_CTRL);
	} else {
		writel(0, fpwm->base + APPLE_PWM_CTRL);
	}
	return 0;
}

static int apple_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
			   struct pwm_state *state)
{
	struct apple_pwm *fpwm;
	u32 on_cycles, off_cycles, ctrl;

	fpwm = to_apple_pwm(chip);

	ctrl = readl(fpwm->base + APPLE_PWM_CTRL);
	on_cycles = readl(fpwm->base + APPLE_PWM_ON_CYCLES);
	off_cycles = readl(fpwm->base + APPLE_PWM_OFF_CYCLES);

	state->enabled = (ctrl & APPLE_PWM_CTRL_ENABLE) && (ctrl & APPLE_PWM_CTRL_OUTPUT_ENABLE);
	state->polarity = PWM_POLARITY_NORMAL;
	// on_cycles + off_cycles is 33 bits, NSEC_PER_SEC is 30, there is no overflow
	state->duty_cycle = DIV64_U64_ROUND_UP((u64)on_cycles * NSEC_PER_SEC, fpwm->clkrate);
	state->period = DIV64_U64_ROUND_UP(((u64)off_cycles + (u64)on_cycles) *
					    NSEC_PER_SEC, fpwm->clkrate);

	return 0;
}

static const struct pwm_ops apple_pwm_ops = {
	.apply = apple_pwm_apply,
	.get_state = apple_pwm_get_state,
};

static int apple_pwm_probe(struct platform_device *pdev)
{
	struct pwm_chip *chip;
	struct apple_pwm *fpwm;
	struct clk *clk;
	int ret;

	chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*fpwm));
	if (IS_ERR(chip))
		return PTR_ERR(chip);

	fpwm = to_apple_pwm(chip);

	fpwm->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(fpwm->base))
		return PTR_ERR(fpwm->base);

	clk = devm_clk_get_enabled(&pdev->dev, NULL);
	if (IS_ERR(clk))
		return dev_err_probe(&pdev->dev, PTR_ERR(clk), "unable to get the clock");

Annotation

Implementation Notes