drivers/pwm/pwm-pxa.c
Source file repositories/reference/linux-study-clean/drivers/pwm/pwm-pxa.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/pwm/pwm-pxa.c- Extension
.c- Size
- 5508 bytes
- Lines
- 223
- Domain
- Driver Families
- Bucket
- drivers/pwm
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mod_devicetable.hlinux/module.hlinux/kernel.hlinux/platform_device.hlinux/slab.hlinux/err.hlinux/clk.hlinux/io.hlinux/pwm.hlinux/of.hlinux/reset.hasm/div64.h
Detected Declarations
struct pxa_pwm_chipfunction pxa_pwm_configfunction pxa_pwm_applyfunction pwm_probe
Annotated Snippet
struct pxa_pwm_chip {
struct device *dev;
struct clk *clk;
void __iomem *mmio_base;
};
static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
{
return pwmchip_get_drvdata(chip);
}
/*
* period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
* duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
*/
static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
u64 duty_ns, u64 period_ns)
{
struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
unsigned long long c;
unsigned long period_cycles, prescale, pv, dc;
unsigned long offset;
offset = pwm->hwpwm ? 0x10 : 0;
c = clk_get_rate(pc->clk);
c = c * period_ns;
do_div(c, 1000000000);
period_cycles = c;
if (period_cycles < 1)
period_cycles = 1;
prescale = (period_cycles - 1) / 1024;
pv = period_cycles / (prescale + 1) - 1;
if (prescale > 63)
return -EINVAL;
if (duty_ns == period_ns)
dc = PWMDCR_FD;
else
dc = mul_u64_u64_div_u64(pv + 1, duty_ns, period_ns);
writel(prescale | PWMCR_SD, pc->mmio_base + offset + PWMCR);
writel(dc, pc->mmio_base + offset + PWMDCR);
writel(pv, pc->mmio_base + offset + PWMPCR);
return 0;
}
static int pxa_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{
struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
u64 duty_cycle;
int err;
if (state->polarity != PWM_POLARITY_NORMAL)
return -EINVAL;
err = clk_prepare_enable(pc->clk);
if (err)
return err;
duty_cycle = state->enabled ? state->duty_cycle : 0;
err = pxa_pwm_config(chip, pwm, duty_cycle, state->period);
if (err) {
clk_disable_unprepare(pc->clk);
return err;
}
if (state->enabled && !pwm->state.enabled)
return 0;
clk_disable_unprepare(pc->clk);
if (!state->enabled && pwm->state.enabled)
clk_disable_unprepare(pc->clk);
return 0;
}
static const struct pwm_ops pxa_pwm_ops = {
.apply = pxa_pwm_apply,
};
#ifdef CONFIG_OF
/*
Annotation
- Immediate include surface: `linux/mod_devicetable.h`, `linux/module.h`, `linux/kernel.h`, `linux/platform_device.h`, `linux/slab.h`, `linux/err.h`, `linux/clk.h`, `linux/io.h`.
- Detected declarations: `struct pxa_pwm_chip`, `function pxa_pwm_config`, `function pxa_pwm_apply`, `function pwm_probe`.
- Atlas domain: Driver Families / drivers/pwm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.