drivers/pwm/pwm-sl28cpld.c

Source file repositories/reference/linux-study-clean/drivers/pwm/pwm-sl28cpld.c

File Facts

System
Linux kernel
Corpus path
drivers/pwm/pwm-sl28cpld.c
Extension
.c
Size
8468 bytes
Lines
264
Domain
Driver Families
Bucket
drivers/pwm
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct sl28cpld_pwm {
	struct regmap *regmap;
	u32 offset;
};

static inline struct sl28cpld_pwm *sl28cpld_pwm_from_chip(struct pwm_chip *chip)
{
	return pwmchip_get_drvdata(chip);
}

static int sl28cpld_pwm_get_state(struct pwm_chip *chip,
				  struct pwm_device *pwm,
				  struct pwm_state *state)
{
	struct sl28cpld_pwm *priv = sl28cpld_pwm_from_chip(chip);
	unsigned int reg;
	int prescaler;

	sl28cpld_pwm_read(priv, SL28CPLD_PWM_CTRL, &reg);

	state->enabled = reg & SL28CPLD_PWM_CTRL_ENABLE;

	prescaler = FIELD_GET(SL28CPLD_PWM_CTRL_PRESCALER_MASK, reg);
	state->period = SL28CPLD_PWM_PERIOD(prescaler);

	sl28cpld_pwm_read(priv, SL28CPLD_PWM_CYCLE, &reg);
	state->duty_cycle = SL28CPLD_PWM_TO_DUTY_CYCLE(reg);
	state->polarity = PWM_POLARITY_NORMAL;

	/*
	 * Sanitize values for the PWM core. Depending on the prescaler it
	 * might happen that we calculate a duty_cycle greater than the actual
	 * period. This might happen if someone (e.g. the bootloader) sets an
	 * invalid combination of values. The behavior of the hardware is
	 * undefined in this case. But we need to report sane values back to
	 * the PWM core.
	 */
	state->duty_cycle = min(state->duty_cycle, state->period);

	return 0;
}

static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			      const struct pwm_state *state)
{
	struct sl28cpld_pwm *priv = sl28cpld_pwm_from_chip(chip);
	unsigned int cycle, prescaler;
	bool write_duty_cycle_first;
	int ret;
	u8 ctrl;

	/* Polarity inversion is not supported */
	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	/*
	 * Calculate the prescaler. Pick the biggest period that isn't
	 * bigger than the requested period.
	 */
	prescaler = DIV_ROUND_UP_ULL(SL28CPLD_PWM_PERIOD(0), state->period);
	prescaler = order_base_2(prescaler);

	if (prescaler > field_max(SL28CPLD_PWM_CTRL_PRESCALER_MASK))
		return -ERANGE;

	ctrl = FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, prescaler);
	if (state->enabled)
		ctrl |= SL28CPLD_PWM_CTRL_ENABLE;

	cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle);
	cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler));

	/*
	 * Work around the hardware limitation. See also above. Trap 100% duty
	 * cycle if the prescaler is 0. Set prescaler to 1 instead. We don't
	 * care about the frequency because its "all-one" in either case.
	 *
	 * We don't need to check the actual prescaler setting, because only
	 * if the prescaler is 0 we can have this particular value.
	 */
	if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) {
		ctrl &= ~SL28CPLD_PWM_CTRL_PRESCALER_MASK;
		ctrl |= FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, 1);
		cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1);
	}

	/*
	 * To avoid glitches when we switch the prescaler, we have to make sure
	 * we have a valid duty cycle for the new mode.
	 *

Annotation

Implementation Notes