drivers/ras/amd/atl/denormalize.c

Source file repositories/reference/linux-study-clean/drivers/ras/amd/atl/denormalize.c

File Facts

System: Linux kernel
Corpus path: drivers/ras/amd/atl/denormalize.c
Extension: .c
Size: 39087 bytes
Lines: 1280
Domain: Driver Families
Bucket: drivers/ras
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

internal.h

Detected Declarations

function Copyright
function bit
function make_space_for_coh_st_id_split_2_1
function make_space_for_coh_st_id_mi300
function make_space_for_coh_st_id
function get_coh_st_id_df2
function get_coh_st_id_df4
function get_coh_st_id_mi300
function calculate_coh_st_id
function insert_coh_st_id_at_intlv_bit
function insert_coh_st_id_split_2_1
function insert_coh_st_id_split_2_2
function insert_coh_st_id
function get_logical_coh_st_fabric_id_mi300
function get_logical_coh_st_fabric_id
function get_logical_coh_st_fabric_id_for_current_spa
function denorm_addr_common
function denorm_addr_df3_6chan
function denorm_addr_df4_np2
function normalize_addr_df4p5_np2
function recalculate_hashed_bits_df4p5_np2
function match_logical_coh_st_fabric_id
function match_norm_addr
function check_permutations
function init_df4p5_denorm_ctx
function denorm_addr_df4p5_np2
function denormalize_address

Annotated Snippet

switch (ctx->map.intlv_mode) {
		case DF4p5_NPS0_24CHAN_2K_HASH:
			denorm_addr |= temp_addr << 14;
			break;

		case DF4p5_NPS0_24CHAN_1K_HASH:
		case DF4p5_NPS1_12CHAN_2K_HASH:
			denorm_addr |= temp_addr << 13;
			break;

		case DF4p5_NPS1_12CHAN_1K_HASH:
		case DF4p5_NPS2_6CHAN_2K_HASH:
		case DF4p5_NPS1_10CHAN_2K_HASH:
			denorm_addr |= temp_addr << 12;
			break;

		case DF4p5_NPS2_6CHAN_1K_HASH:
		case DF4p5_NPS1_10CHAN_1K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), temp_addr) << 9;
			denorm_addr |= FIELD_GET(GENMASK_ULL(63, 1), temp_addr) << 12;
			break;

		case DF4p5_NPS4_3CHAN_1K_HASH:
		case DF4p5_NPS2_5CHAN_1K_HASH:
			denorm_addr |= FIELD_GET(GENMASK_ULL(1, 0), temp_addr) << 8;
			denorm_addr |= FIELD_GET(GENMASK_ULL(63, 2), (temp_addr)) << 12;
			break;

		case DF4p5_NPS4_3CHAN_2K_HASH:
		case DF4p5_NPS2_5CHAN_2K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), temp_addr) << 8;
			denorm_addr |= FIELD_GET(GENMASK_ULL(63, 1), temp_addr) << 12;
			break;

		default:
			atl_debug_on_bad_intlv_mode(ctx);
			return -EINVAL;
		}

		switch (ctx->map.intlv_mode) {
		case DF4p5_NPS0_24CHAN_1K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), test_perm) << 8;
			denorm_addr |= FIELD_GET(BIT_ULL(1), test_perm) << 9;
			denorm_addr |= FIELD_GET(BIT_ULL(2), test_perm) << 12;
			break;

		case DF4p5_NPS0_24CHAN_2K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), test_perm) << 8;
			denorm_addr |= FIELD_GET(BIT_ULL(1), test_perm) << 12;
			denorm_addr |= FIELD_GET(BIT_ULL(2), test_perm) << 13;
			break;

		case DF4p5_NPS1_12CHAN_2K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), test_perm) << 8;
			denorm_addr |= FIELD_GET(BIT_ULL(1), test_perm) << 12;
			break;

		case DF4p5_NPS1_12CHAN_1K_HASH:
		case DF4p5_NPS4_3CHAN_1K_HASH:
		case DF4p5_NPS2_5CHAN_1K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), test_perm) << 8;
			denorm_addr |= FIELD_GET(BIT_ULL(1), test_perm) << 9;
			break;

		case DF4p5_NPS2_6CHAN_1K_HASH:
		case DF4p5_NPS2_6CHAN_2K_HASH:
		case DF4p5_NPS4_3CHAN_2K_HASH:
		case DF4p5_NPS1_10CHAN_1K_HASH:
		case DF4p5_NPS1_10CHAN_2K_HASH:
		case DF4p5_NPS2_5CHAN_2K_HASH:
			denorm_addr |= FIELD_GET(BIT_ULL(0), test_perm) << 8;
			break;

		default:
			atl_debug_on_bad_intlv_mode(ctx);
			return -EINVAL;
		}

		denorm_ctx->current_spa = add_base_and_hole(ctx, denorm_addr);
		recalculate_hashed_bits_df4p5_np2(ctx, denorm_ctx);

		atl_debug(ctx, "Checking potential system physical address 0x%016llx\n",
			  denorm_ctx->current_spa);

		if (!match_logical_coh_st_fabric_id(ctx, denorm_ctx))
			continue;

		if (!match_norm_addr(ctx, denorm_ctx))
			continue;

Annotation

Immediate include surface: `internal.h`.
Detected declarations: `function Copyright`, `function bit`, `function make_space_for_coh_st_id_split_2_1`, `function make_space_for_coh_st_id_mi300`, `function make_space_for_coh_st_id`, `function get_coh_st_id_df2`, `function get_coh_st_id_df4`, `function get_coh_st_id_mi300`, `function calculate_coh_st_id`, `function insert_coh_st_id_at_intlv_bit`.
Atlas domain: Driver Families / drivers/ras.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.