drivers/reset/reset-hsdk.c
Source file repositories/reference/linux-study-clean/drivers/reset/reset-hsdk.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/reset/reset-hsdk.c- Extension
.c- Size
- 3485 bytes
- Lines
- 136
- Domain
- Driver Families
- Bucket
- drivers/reset
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/io.hlinux/iopoll.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/reset-controller.hlinux/slab.hlinux/types.h
Detected Declarations
struct hsdk_rstfunction hsdk_reset_configfunction hsdk_reset_dofunction hsdk_reset_resetfunction hsdk_reset_probe
Annotated Snippet
struct hsdk_rst {
void __iomem *regs_ctl;
void __iomem *regs_rst;
spinlock_t lock;
struct reset_controller_dev rcdev;
};
static const u32 rst_map[] = {
BIT(16), /* APB_RST */
BIT(17), /* AXI_RST */
BIT(18), /* ETH_RST */
BIT(19), /* USB_RST */
BIT(20), /* SDIO_RST */
BIT(21), /* HDMI_RST */
BIT(22), /* GFX_RST */
BIT(25), /* DMAC_RST */
BIT(31), /* EBI_RST */
};
#define HSDK_MAX_RESETS ARRAY_SIZE(rst_map)
#define CGU_SYS_RST_CTRL 0x0
#define CGU_IP_SW_RESET 0x0
#define CGU_IP_SW_RESET_DELAY_SHIFT 16
#define CGU_IP_SW_RESET_DELAY_MASK GENMASK(31, CGU_IP_SW_RESET_DELAY_SHIFT)
#define CGU_IP_SW_RESET_DELAY 0
#define CGU_IP_SW_RESET_RESET BIT(0)
#define SW_RESET_TIMEOUT 10000
static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id)
{
writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
}
static int hsdk_reset_do(struct hsdk_rst *rst)
{
u32 reg;
reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
reg &= ~CGU_IP_SW_RESET_DELAY_MASK;
reg |= CGU_IP_SW_RESET_DELAY << CGU_IP_SW_RESET_DELAY_SHIFT;
reg |= CGU_IP_SW_RESET_RESET;
writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
/* wait till reset bit is back to 0 */
return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg,
!(reg & CGU_IP_SW_RESET_RESET), 5, SW_RESET_TIMEOUT);
}
static int hsdk_reset_reset(struct reset_controller_dev *rcdev,
unsigned long id)
{
struct hsdk_rst *rst = to_hsdk_rst(rcdev);
unsigned long flags;
int ret;
spin_lock_irqsave(&rst->lock, flags);
hsdk_reset_config(rst, id);
ret = hsdk_reset_do(rst);
spin_unlock_irqrestore(&rst->lock, flags);
return ret;
}
static const struct reset_control_ops hsdk_reset_ops = {
.reset = hsdk_reset_reset,
.deassert = hsdk_reset_reset,
};
static int hsdk_reset_probe(struct platform_device *pdev)
{
struct hsdk_rst *rst;
rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL);
if (!rst)
return -ENOMEM;
rst->regs_ctl = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(rst->regs_ctl))
return PTR_ERR(rst->regs_ctl);
rst->regs_rst = devm_platform_ioremap_resource(pdev, 1);
if (IS_ERR(rst->regs_rst))
return PTR_ERR(rst->regs_rst);
spin_lock_init(&rst->lock);
rst->rcdev.owner = THIS_MODULE;
rst->rcdev.ops = &hsdk_reset_ops;
rst->rcdev.of_node = pdev->dev.of_node;
Annotation
- Immediate include surface: `linux/delay.h`, `linux/io.h`, `linux/iopoll.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`, `linux/reset-controller.h`, `linux/slab.h`.
- Detected declarations: `struct hsdk_rst`, `function hsdk_reset_config`, `function hsdk_reset_do`, `function hsdk_reset_reset`, `function hsdk_reset_probe`.
- Atlas domain: Driver Families / drivers/reset.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.