drivers/rpmsg/qcom_glink_smem.c
Source file repositories/reference/linux-study-clean/drivers/rpmsg/qcom_glink_smem.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/rpmsg/qcom_glink_smem.c- Extension
.c- Size
- 8762 bytes
- Lines
- 379
- Domain
- Driver Families
- Bucket
- drivers/rpmsg
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/module.hlinux/of.hlinux/of_address.hlinux/of_irq.hlinux/interrupt.hlinux/platform_device.hlinux/mailbox_client.hlinux/mfd/syscon.hlinux/slab.hlinux/rpmsg.hlinux/idr.hlinux/circ_buf.hlinux/soc/qcom/smem.hlinux/sizes.hlinux/delay.hlinux/regmap.hlinux/workqueue.hlinux/list.hlinux/rpmsg/qcom_glink.hqcom_glink_native.h
Detected Declarations
struct qcom_glink_smemstruct glink_smem_pipefunction glink_smem_rx_availfunction glink_smem_rx_peekfunction glink_smem_rx_advancefunction glink_smem_tx_availfunction glink_smem_tx_write_onefunction glink_smem_tx_writefunction glink_smem_tx_kickfunction qcom_glink_smem_intrfunction qcom_glink_smem_releasefunction qcom_glink_smem_unregisterexport qcom_glink_smem_registerexport qcom_glink_smem_unregister
Annotated Snippet
struct qcom_glink_smem {
struct device dev;
int irq;
struct qcom_glink *glink;
struct mbox_client mbox_client;
struct mbox_chan *mbox_chan;
u32 remote_pid;
};
struct glink_smem_pipe {
struct qcom_glink_pipe native;
__le32 *tail;
__le32 *head;
void *fifo;
struct qcom_glink_smem *smem;
};
#define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
{
struct glink_smem_pipe *pipe = to_smem_pipe(np);
struct qcom_glink_smem *smem = pipe->smem;
size_t len;
void *fifo;
u32 head;
u32 tail;
if (!pipe->fifo) {
fifo = qcom_smem_get(smem->remote_pid,
SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
if (IS_ERR(fifo)) {
pr_err("failed to acquire RX fifo handle: %ld\n",
PTR_ERR(fifo));
return 0;
}
pipe->fifo = fifo;
pipe->native.length = len;
}
head = le32_to_cpu(*pipe->head);
tail = le32_to_cpu(*pipe->tail);
if (head < tail)
return pipe->native.length - tail + head;
else
return head - tail;
}
static void glink_smem_rx_peek(struct qcom_glink_pipe *np,
void *data, unsigned int offset, size_t count)
{
struct glink_smem_pipe *pipe = to_smem_pipe(np);
size_t len;
u32 tail;
tail = le32_to_cpu(*pipe->tail);
tail += offset;
if (tail >= pipe->native.length)
tail -= pipe->native.length;
len = min_t(size_t, count, pipe->native.length - tail);
if (len)
memcpy_fromio(data, pipe->fifo + tail, len);
if (len != count)
memcpy_fromio(data + len, pipe->fifo, (count - len));
}
static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
size_t count)
{
struct glink_smem_pipe *pipe = to_smem_pipe(np);
u32 tail;
tail = le32_to_cpu(*pipe->tail);
tail += count;
if (tail >= pipe->native.length)
tail -= pipe->native.length;
*pipe->tail = cpu_to_le32(tail);
}
Annotation
- Immediate include surface: `linux/io.h`, `linux/module.h`, `linux/of.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/interrupt.h`, `linux/platform_device.h`, `linux/mailbox_client.h`.
- Detected declarations: `struct qcom_glink_smem`, `struct glink_smem_pipe`, `function glink_smem_rx_avail`, `function glink_smem_rx_peek`, `function glink_smem_rx_advance`, `function glink_smem_tx_avail`, `function glink_smem_tx_write_one`, `function glink_smem_tx_write`, `function glink_smem_tx_kick`, `function qcom_glink_smem_intr`.
- Atlas domain: Driver Families / drivers/rpmsg.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.