drivers/rtc/rtc-s32g.c
Source file repositories/reference/linux-study-clean/drivers/rtc/rtc-s32g.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/rtc/rtc-s32g.c- Extension
.c- Size
- 8841 bytes
- Lines
- 386
- Domain
- Driver Families
- Bucket
- drivers/rtc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/iopoll.hlinux/of_irq.hlinux/platform_device.hlinux/rtc.h
Detected Declarations
struct rtc_privstruct rtc_soc_datafunction s32g_rtc_handlerfunction s32g_rtc_read_timefunction s32g_rtc_read_alarmfunction s32g_rtc_alarm_irq_enablefunction s32g_rtc_set_alarmfunction s32g_rtc_disablefunction s32g_rtc_enablefunction rtc_clk_src_setupfunction rtc_clk_dts_setupfunction s32g_rtc_probefunction s32g_rtc_suspendfunction s32g_rtc_resume
Annotated Snippet
struct rtc_priv {
struct rtc_device *rdev;
void __iomem *rtc_base;
struct clk *ipg;
struct clk *clk_src;
const struct rtc_soc_data *rtc_data;
u64 rtc_hz;
time64_t sleep_sec;
int irq;
u32 clk_src_idx;
};
struct rtc_soc_data {
u32 clk_div;
u32 reserved_clk_mask;
};
static const struct rtc_soc_data rtc_s32g2_data = {
.clk_div = DIV512_32,
.reserved_clk_mask = RTC_CLK_SRC1_RESERVED,
};
static irqreturn_t s32g_rtc_handler(int irq, void *dev)
{
struct rtc_priv *priv = platform_get_drvdata(dev);
u32 status;
status = readl(priv->rtc_base + RTCS_OFFSET);
if (status & RTCS_APIF) {
writel(0x0, priv->rtc_base + APIVAL_OFFSET);
writel(status | RTCS_APIF, priv->rtc_base + RTCS_OFFSET);
}
rtc_update_irq(priv->rdev, 1, RTC_IRQF | RTC_AF);
return IRQ_HANDLED;
}
/*
* The function is not really getting time from the RTC since the S32G RTC
* has several limitations. Thus, to setup alarm use system time.
*/
static int s32g_rtc_read_time(struct device *dev,
struct rtc_time *tm)
{
struct rtc_priv *priv = dev_get_drvdata(dev);
time64_t sec;
if (check_add_overflow(ktime_get_real_seconds(),
priv->sleep_sec, &sec))
return -ERANGE;
rtc_time64_to_tm(sec, tm);
return 0;
}
static int s32g_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
struct rtc_priv *priv = dev_get_drvdata(dev);
u32 rtcc, rtcs;
rtcc = readl(priv->rtc_base + RTCC_OFFSET);
rtcs = readl(priv->rtc_base + RTCS_OFFSET);
alrm->enabled = rtcc & RTCC_APIIE;
if (alrm->enabled)
alrm->pending = !(rtcs & RTCS_APIF);
return 0;
}
static int s32g_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
struct rtc_priv *priv = dev_get_drvdata(dev);
u32 rtcc;
/* RTC API functionality is used both for triggering interrupts
* and as a wakeup event. Hence it should always be enabled.
*/
rtcc = readl(priv->rtc_base + RTCC_OFFSET);
rtcc |= RTCC_APIEN | RTCC_APIIE;
writel(rtcc, priv->rtc_base + RTCC_OFFSET);
return 0;
}
static int s32g_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/iopoll.h`, `linux/of_irq.h`, `linux/platform_device.h`, `linux/rtc.h`.
- Detected declarations: `struct rtc_priv`, `struct rtc_soc_data`, `function s32g_rtc_handler`, `function s32g_rtc_read_time`, `function s32g_rtc_read_alarm`, `function s32g_rtc_alarm_irq_enable`, `function s32g_rtc_set_alarm`, `function s32g_rtc_disable`, `function s32g_rtc_enable`, `function rtc_clk_src_setup`.
- Atlas domain: Driver Families / drivers/rtc.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.