drivers/s390/cio/eadm_sch.h

File Facts

System

Linux kernel

Corpus path

drivers/s390/cio/eadm_sch.h

Extension

.h

Size

561 bytes

Lines

24

Domain

Driver Families

Bucket

drivers/s390

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/completion.h
• linux/device.h
• linux/timer.h
• linux/list.h
• orb.h

Detected Declarations

• struct eadm_private

Annotated Snippet

struct eadm_private {
	union orb orb;
	enum {EADM_IDLE, EADM_BUSY, EADM_NOT_OPER} state;
	struct completion *completion;
	struct subchannel *sch;
	struct timer_list timer;
	struct list_head head;
} __aligned(8);

#define get_eadm_private(n) ((struct eadm_private *)dev_get_drvdata(&n->dev))
#define set_eadm_private(n, p) (dev_set_drvdata(&n->dev, p))

#endif

Annotation

• Immediate include surface: `linux/completion.h`, `linux/device.h`, `linux/timer.h`, `linux/list.h`, `orb.h`.
• Detected declarations: `struct eadm_private`.
• Atlas domain: Driver Families / drivers/s390.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.