drivers/scsi/aic7xxx/aic7xxx_core.c
Source file repositories/reference/linux-study-clean/drivers/scsi/aic7xxx/aic7xxx_core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/aic7xxx/aic7xxx_core.c- Extension
.c- Size
- 213948 bytes
- Lines
- 7902
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
aic7xxx_osm.haic7xxx_inline.haicasm/aicasm_insformat.haic7xxx_seq.h
Detected Declarations
struct ahc_hard_error_entryfunction ahc_freeze_untagged_queuesfunction ahc_release_untagged_queuesfunction systemfunction ahc_is_pausedfunction ahc_pausefunction ahc_unpausefunction ahc_sg_bus_to_virtfunction ahc_sg_virt_to_busfunction ahc_hscb_busaddrfunction ahc_sync_scbfunction ahc_sync_sglistfunction ahc_targetcmd_offsetfunction ahc_update_residualfunction ahc_fetch_transinfofunction ahc_inwfunction ahc_outwfunction ahc_inlfunction ahc_outlfunction ahc_inqfunction ahc_outqfunction ahc_get_scbfunction ahc_free_scbfunction ahc_lookup_scbfunction ahc_swap_with_next_hscbfunction ahc_queue_scbfunction ahc_get_sense_buffunction ahc_get_sense_bufaddrfunction ahc_sync_qoutfifofunction ahc_sync_tqinfifofunction ahc_check_cmdcmpltqueuesfunction ahc_intrfunction ahc_restartfunction ahc_run_qoutfifofunction ahc_run_untagged_queuesfunction ahc_run_untagged_queuefunction ahc_handle_brkadrintfunction ahc_handle_seqintfunction phasefunction phasefunction ahc_handle_scsiintfunction ahc_force_renegotiationfunction ahc_clear_critical_sectionfunction ahc_clear_intstatfunction ahc_print_scbfunction instancefunction tstatefunction instance
Annotated Snippet
struct ahc_hard_error_entry {
uint8_t errno;
const char *errmesg;
};
static const struct ahc_hard_error_entry ahc_hard_errors[] = {
{ ILLHADDR, "Illegal Host Access" },
{ ILLSADDR, "Illegal Sequencer Address referenced" },
{ ILLOPCODE, "Illegal Opcode in sequencer program" },
{ SQPARERR, "Sequencer Parity Error" },
{ DPARERR, "Data-path Parity Error" },
{ MPARERR, "Scratch or SCB Memory Parity Error" },
{ PCIERRSTAT, "PCI Error detected" },
{ CIOPARERR, "CIOBUS Parity Error" },
};
static const u_int num_errors = ARRAY_SIZE(ahc_hard_errors);
static const struct ahc_phase_table_entry ahc_phase_table[] =
{
{ P_DATAOUT, NOP, "in Data-out phase" },
{ P_DATAIN, INITIATOR_ERROR, "in Data-in phase" },
{ P_DATAOUT_DT, NOP, "in DT Data-out phase" },
{ P_DATAIN_DT, INITIATOR_ERROR, "in DT Data-in phase" },
{ P_COMMAND, NOP, "in Command phase" },
{ P_MESGOUT, NOP, "in Message-out phase" },
{ P_STATUS, INITIATOR_ERROR, "in Status phase" },
{ P_MESGIN, MSG_PARITY_ERROR, "in Message-in phase" },
{ P_BUSFREE, NOP, "while idle" },
{ 0, NOP, "in unknown phase" }
};
/*
* In most cases we only wish to itterate over real phases, so
* exclude the last element from the count.
*/
static const u_int num_phases = ARRAY_SIZE(ahc_phase_table) - 1;
/*
* Valid SCSIRATE values. (p. 3-17)
* Provides a mapping of tranfer periods in ns to the proper value to
* stick in the scsixfer reg.
*/
static const struct ahc_syncrate ahc_syncrates[] =
{
/* ultra2 fast/ultra period rate */
{ 0x42, 0x000, 9, "80.0" },
{ 0x03, 0x000, 10, "40.0" },
{ 0x04, 0x000, 11, "33.0" },
{ 0x05, 0x100, 12, "20.0" },
{ 0x06, 0x110, 15, "16.0" },
{ 0x07, 0x120, 18, "13.4" },
{ 0x08, 0x000, 25, "10.0" },
{ 0x19, 0x010, 31, "8.0" },
{ 0x1a, 0x020, 37, "6.67" },
{ 0x1b, 0x030, 43, "5.7" },
{ 0x1c, 0x040, 50, "5.0" },
{ 0x00, 0x050, 56, "4.4" },
{ 0x00, 0x060, 62, "4.0" },
{ 0x00, 0x070, 68, "3.6" },
{ 0x00, 0x000, 0, NULL }
};
/* Our Sequencer Program */
#include "aic7xxx_seq.h"
/**************************** Function Declarations ***************************/
static void ahc_force_renegotiation(struct ahc_softc *ahc,
struct ahc_devinfo *devinfo);
static struct ahc_tmode_tstate*
ahc_alloc_tstate(struct ahc_softc *ahc,
u_int scsi_id, char channel);
#ifdef AHC_TARGET_MODE
static void ahc_free_tstate(struct ahc_softc *ahc,
u_int scsi_id, char channel, int force);
#endif
static const struct ahc_syncrate*
ahc_devlimited_syncrate(struct ahc_softc *ahc,
struct ahc_initiator_tinfo *,
u_int *period,
u_int *ppr_options,
role_t role);
static void ahc_update_pending_scbs(struct ahc_softc *ahc);
static void ahc_fetch_devinfo(struct ahc_softc *ahc,
struct ahc_devinfo *devinfo);
static void ahc_scb_devinfo(struct ahc_softc *ahc,
struct ahc_devinfo *devinfo,
struct scb *scb);
static void ahc_assert_atn(struct ahc_softc *ahc);
static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
struct ahc_devinfo *devinfo,
Annotation
- Immediate include surface: `aic7xxx_osm.h`, `aic7xxx_inline.h`, `aicasm/aicasm_insformat.h`, `aic7xxx_seq.h`.
- Detected declarations: `struct ahc_hard_error_entry`, `function ahc_freeze_untagged_queues`, `function ahc_release_untagged_queues`, `function system`, `function ahc_is_paused`, `function ahc_pause`, `function ahc_unpause`, `function ahc_sg_bus_to_virt`, `function ahc_sg_virt_to_bus`, `function ahc_hscb_busaddr`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.