drivers/scsi/aic94xx/aic94xx_hwi.c
Source file repositories/reference/linux-study-clean/drivers/scsi/aic94xx/aic94xx_hwi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/aic94xx/aic94xx_hwi.c- Extension
.c- Size
- 37924 bytes
- Lines
- 1368
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/slab.hlinux/delay.hlinux/module.hlinux/firmware.haic94xx.haic94xx_reg.haic94xx_hwi.haic94xx_seq.haic94xx_dump.h
Detected Declarations
function asd_get_user_sas_addrfunction asd_propagate_sas_addrfunction asd_init_phy_identifyfunction asd_init_phyfunction asd_init_portsfunction asd_init_physfunction asd_init_swfunction asd_init_scbsfunction asd_get_max_scb_ddbfunction asd_init_dlfunction asd_alloc_edbsfunction asd_alloc_escbsfunction asd_assign_edbs2escbsfunction ASD_EDBS_PER_SCBfunction asd_chip_hardrstfunction asd_enable_intsfunction asd_extend_devctx_ocmfunction asd_extend_devctxfunction asd_extend_cmdctxfunction asd_init_ctxmemfunction asd_init_hwfunction asd_init_chipfunction asd_dl_tasklet_handlerfunction asd_process_donelist_isrfunction asd_com_sas_isrfunction asd_arp2_errfunction for_each_sequencerfunction asd_dch_sas_isrfunction asd_rbi_exsi_isrfunction asd_hst_pcix_isrfunction asd_hw_isrfunction SCBfunction asd_post_ascb_listfunction asd_post_escb_listfunction asd_init_escbsfunction asd_turn_ledfunction asd_control_ledfunction asd_enable_phyfunction asd_enable_physfunction for_each_phy
Annotated Snippet
if (reg & HARDRSTDET) {
asd_write_reg_dword(asd_ha, CHIMINT,
HARDRSTDET|PORRSTDET);
return 0;
}
} while (--count > 0);
return -ENODEV;
}
/**
* asd_init_chip -- initialize the chip
* @asd_ha: pointer to host adapter structure
*
* Hard resets the chip, disables HA interrupts, downloads the sequnecer
* microcode and starts the sequencers. The caller has to explicitly
* enable HA interrupts with asd_enable_ints(asd_ha).
*/
static int asd_init_chip(struct asd_ha_struct *asd_ha)
{
int err;
err = asd_chip_hardrst(asd_ha);
if (err) {
asd_printk("couldn't hard reset %s\n",
pci_name(asd_ha->pcidev));
goto out;
}
asd_disable_ints(asd_ha);
err = asd_init_seqs(asd_ha);
if (err) {
asd_printk("couldn't init seqs for %s\n",
pci_name(asd_ha->pcidev));
goto out;
}
err = asd_start_seqs(asd_ha);
if (err) {
asd_printk("couldn't start seqs for %s\n",
pci_name(asd_ha->pcidev));
goto out;
}
out:
return err;
}
#define MAX_DEVS ((OCM_MAX_SIZE) / (ASD_DDB_SIZE))
static int max_devs = 0;
module_param_named(max_devs, max_devs, int, S_IRUGO);
MODULE_PARM_DESC(max_devs, "\n"
"\tMaximum number of SAS devices to support (not LUs).\n"
"\tDefault: 2176, Maximum: 65663.\n");
static int max_cmnds = 0;
module_param_named(max_cmnds, max_cmnds, int, S_IRUGO);
MODULE_PARM_DESC(max_cmnds, "\n"
"\tMaximum number of commands queuable.\n"
"\tDefault: 512, Maximum: 66047.\n");
static void asd_extend_devctx_ocm(struct asd_ha_struct *asd_ha)
{
unsigned long dma_addr = OCM_BASE_ADDR;
u32 d;
dma_addr -= asd_ha->hw_prof.max_ddbs * ASD_DDB_SIZE;
asd_write_reg_addr(asd_ha, DEVCTXBASE, (dma_addr_t) dma_addr);
d = asd_read_reg_dword(asd_ha, CTXDOMAIN);
d |= 4;
asd_write_reg_dword(asd_ha, CTXDOMAIN, d);
asd_ha->hw_prof.max_ddbs += MAX_DEVS;
}
static int asd_extend_devctx(struct asd_ha_struct *asd_ha)
{
dma_addr_t dma_handle;
unsigned long dma_addr;
u32 d;
int size;
asd_extend_devctx_ocm(asd_ha);
asd_ha->hw_prof.ddb_ext = NULL;
if (max_devs <= asd_ha->hw_prof.max_ddbs || max_devs > 0xFFFF) {
max_devs = asd_ha->hw_prof.max_ddbs;
return 0;
}
Annotation
- Immediate include surface: `linux/pci.h`, `linux/slab.h`, `linux/delay.h`, `linux/module.h`, `linux/firmware.h`, `aic94xx.h`, `aic94xx_reg.h`, `aic94xx_hwi.h`.
- Detected declarations: `function asd_get_user_sas_addr`, `function asd_propagate_sas_addr`, `function asd_init_phy_identify`, `function asd_init_phy`, `function asd_init_ports`, `function asd_init_phys`, `function asd_init_sw`, `function asd_init_scbs`, `function asd_get_max_scb_ddb`, `function asd_init_dl`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.