drivers/scsi/bfa/bfa_core.c
Source file repositories/reference/linux-study-clean/drivers/scsi/bfa/bfa_core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/bfa/bfa_core.c- Extension
.c- Size
- 51012 bytes
- Lines
- 1971
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
bfad_drv.hbfa_modules.hbfi_reg.h
Detected Declarations
function __bfa_trcfunction bfa_com_port_attachfunction bfa_com_ablk_attachfunction bfa_com_cee_attachfunction bfa_com_sfp_attachfunction bfa_com_flash_attachfunction bfa_com_diag_attachfunction bfa_com_phy_attachfunction bfa_com_fru_attachfunction bfa_iocfc_sm_stopped_entryfunction bfa_iocfc_sm_initing_entryfunction bfa_iocfc_sm_initingfunction bfa_iocfc_sm_dconf_read_entryfunction bfa_iocfc_sm_dconf_readfunction bfa_iocfc_sm_init_cfg_wait_entryfunction bfa_iocfc_sm_init_cfg_waitfunction bfa_iocfc_sm_init_cfg_done_entryfunction bfa_iocfc_sm_init_cfg_donefunction bfa_iocfc_sm_operational_entryfunction bfa_iocfc_sm_operationalfunction bfa_iocfc_sm_dconf_write_entryfunction bfa_iocfc_sm_dconf_writefunction bfa_iocfc_sm_stopping_entryfunction bfa_iocfc_sm_stoppingfunction bfa_iocfc_sm_enabling_entryfunction bfa_iocfc_sm_enablingfunction bfa_iocfc_sm_cfg_wait_entryfunction bfa_iocfc_sm_cfg_waitfunction bfa_iocfc_sm_disabling_entryfunction bfa_iocfc_sm_disablingfunction bfa_iocfc_sm_disabled_entryfunction bfa_iocfc_sm_disabledfunction bfa_iocfc_sm_failed_entryfunction bfa_iocfc_sm_failedfunction bfa_iocfc_sm_init_failed_entryfunction bfa_iocfc_sm_init_failedfunction bfa_reqq_resumefunction bfa_isr_rspqfunction bfa_isr_reqqfunction bfa_msix_allfunction bfa_intxfunction bfa_isr_enablefunction bfa_isr_disablefunction bfa_msix_reqqfunction bfa_isr_unhandledfunction bfa_msix_rspqfunction bfa_msix_lpu_errfunction bfa_iocfc_send_cfg
Annotated Snippet
if (halt_isr) {
/*
* If LL_HALT bit is set then FW Init Halt LL Port
* Register needs to be cleared as well so Interrupt
* Status Register will be cleared.
*/
curr_value = readl(bfa->ioc.ioc_regs.ll_halt);
curr_value &= ~__FW_INIT_HALT_P;
writel(curr_value, bfa->ioc.ioc_regs.ll_halt);
}
if (pss_isr) {
/*
* ERR_PSS bit needs to be cleared as well in case
* interrups are shared so driver's interrupt handler is
* still called even though it is already masked out.
*/
curr_value = readl(
bfa->ioc.ioc_regs.pss_err_status_reg);
writel(curr_value,
bfa->ioc.ioc_regs.pss_err_status_reg);
}
writel(intr, bfa->iocfc.bfa_regs.intr_status);
bfa_ioc_error_isr(&bfa->ioc);
}
}
/*
* BFA IOC FC related functions
*/
/*
* BFA IOC private functions
*/
/*
* Use the Mailbox interface to send BFI_IOCFC_H2I_CFG_REQ
*/
static void
bfa_iocfc_send_cfg(void *bfa_arg)
{
struct bfa_s *bfa = bfa_arg;
struct bfa_iocfc_s *iocfc = &bfa->iocfc;
struct bfi_iocfc_cfg_req_s cfg_req;
struct bfi_iocfc_cfg_s *cfg_info = iocfc->cfginfo;
struct bfa_iocfc_cfg_s *cfg = &iocfc->cfg;
int i;
WARN_ON(cfg->fwcfg.num_cqs > BFI_IOC_MAX_CQS);
bfa_trc(bfa, cfg->fwcfg.num_cqs);
bfa_iocfc_reset_queues(bfa);
/*
* initialize IOC configuration info
*/
cfg_info->single_msix_vec = 0;
if (bfa->msix.nvecs == 1)
cfg_info->single_msix_vec = 1;
cfg_info->endian_sig = BFI_IOC_ENDIAN_SIG;
cfg_info->num_cqs = cfg->fwcfg.num_cqs;
cfg_info->num_ioim_reqs = cpu_to_be16(bfa_fcpim_get_throttle_cfg(bfa,
cfg->fwcfg.num_ioim_reqs));
cfg_info->num_fwtio_reqs = cpu_to_be16(cfg->fwcfg.num_fwtio_reqs);
bfa_dma_be_addr_set(cfg_info->cfgrsp_addr, iocfc->cfgrsp_dma.pa);
/*
* dma map REQ and RSP circular queues and shadow pointers
*/
for (i = 0; i < cfg->fwcfg.num_cqs; i++) {
bfa_dma_be_addr_set(cfg_info->req_cq_ba[i],
iocfc->req_cq_ba[i].pa);
bfa_dma_be_addr_set(cfg_info->req_shadow_ci[i],
iocfc->req_cq_shadow_ci[i].pa);
cfg_info->req_cq_elems[i] =
cpu_to_be16(cfg->drvcfg.num_reqq_elems);
bfa_dma_be_addr_set(cfg_info->rsp_cq_ba[i],
iocfc->rsp_cq_ba[i].pa);
bfa_dma_be_addr_set(cfg_info->rsp_shadow_pi[i],
iocfc->rsp_cq_shadow_pi[i].pa);
cfg_info->rsp_cq_elems[i] =
cpu_to_be16(cfg->drvcfg.num_rspq_elems);
}
/*
* Enable interrupt coalescing if it is driver init path
* and not ioc disable/enable path.
*/
Annotation
- Immediate include surface: `bfad_drv.h`, `bfa_modules.h`, `bfi_reg.h`.
- Detected declarations: `function __bfa_trc`, `function bfa_com_port_attach`, `function bfa_com_ablk_attach`, `function bfa_com_cee_attach`, `function bfa_com_sfp_attach`, `function bfa_com_flash_attach`, `function bfa_com_diag_attach`, `function bfa_com_phy_attach`, `function bfa_com_fru_attach`, `function bfa_iocfc_sm_stopped_entry`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.