drivers/scsi/csiostor/csio_hw.h
Source file repositories/reference/linux-study-clean/drivers/scsi/csiostor/csio_hw.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/csiostor/csio_hw.h- Extension
.h- Size
- 20823 bytes
- Lines
- 667
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/pci.hlinux/device.hlinux/workqueue.hlinux/compiler.hlinux/cdev.hlinux/list.hlinux/mempool.hlinux/io.hlinux/spinlock_types.hscsi/scsi_device.hscsi/scsi_transport_fc.ht4_hw.hcsio_hw_chip.hcsio_wr.hcsio_mb.hcsio_scsi.hcsio_defs.ht4_regs.ht4_msg.h
Detected Declarations
struct csio_msix_entriesstruct csio_scsi_qsetstruct csio_scsi_cpu_infostruct csio_evt_msgstruct csio_mgmtm_statsstruct csio_mgmtmstruct csio_adap_descstruct pci_paramsstruct csio_hw_paramsstruct csio_vpdstruct link_configstruct csio_pportstruct csio_fcoe_res_infostruct csio_hw_statsstruct csio_hwenum csio_evtenum fw_capsenum cc_pauseenum cc_fecenum csio_hw_evenum csio_intr_modefunction csio_core_ticks_to_usfunction csio_us_to_core_ticks
Annotated Snippet
struct csio_msix_entries {
void *dev_id; /* Priv object associated w/ this msix*/
char desc[24]; /* Description of this vector */
};
struct csio_scsi_qset {
int iq_idx; /* Ingress index */
int eq_idx; /* Egress index */
uint32_t intr_idx; /* MSIX Vector index */
};
struct csio_scsi_cpu_info {
int16_t max_cpus;
};
extern int csio_dbg_level;
extern unsigned int csio_port_mask;
extern int csio_msi;
#define CSIO_VENDOR_ID 0x1425
#define CSIO_ASIC_DEVID_PROTO_MASK 0xFF00
#define CSIO_ASIC_DEVID_TYPE_MASK 0x00FF
#define CSIO_GLBL_INTR_MASK (CIM_F | MPS_F | PL_F | PCIE_F | MC_F | \
EDC0_F | EDC1_F | LE_F | TP_F | MA_F | \
PM_TX_F | PM_RX_F | ULP_RX_F | \
CPL_SWITCH_F | SGE_F | ULP_TX_F | SF_F)
/*
* Hard parameters used to initialize the card in the absence of a
* configuration file.
*/
enum {
/* General */
CSIO_SGE_DBFIFO_INT_THRESH = 10,
CSIO_SGE_RX_DMA_OFFSET = 2,
CSIO_SGE_FLBUF_SIZE1 = 65536,
CSIO_SGE_FLBUF_SIZE2 = 1536,
CSIO_SGE_FLBUF_SIZE3 = 9024,
CSIO_SGE_FLBUF_SIZE4 = 9216,
CSIO_SGE_FLBUF_SIZE5 = 2048,
CSIO_SGE_FLBUF_SIZE6 = 128,
CSIO_SGE_FLBUF_SIZE7 = 8192,
CSIO_SGE_FLBUF_SIZE8 = 16384,
CSIO_SGE_TIMER_VAL_0 = 5,
CSIO_SGE_TIMER_VAL_1 = 10,
CSIO_SGE_TIMER_VAL_2 = 20,
CSIO_SGE_TIMER_VAL_3 = 50,
CSIO_SGE_TIMER_VAL_4 = 100,
CSIO_SGE_TIMER_VAL_5 = 200,
CSIO_SGE_INT_CNT_VAL_0 = 1,
CSIO_SGE_INT_CNT_VAL_1 = 4,
CSIO_SGE_INT_CNT_VAL_2 = 8,
CSIO_SGE_INT_CNT_VAL_3 = 16,
};
/* Slowpath events */
enum csio_evt {
CSIO_EVT_FW = 0, /* FW event */
CSIO_EVT_MBX, /* MBX event */
CSIO_EVT_SCN, /* State change notification */
CSIO_EVT_DEV_LOSS, /* Device loss event */
CSIO_EVT_MAX, /* Max supported event */
};
#define CSIO_EVT_MSG_SIZE 512
#define CSIO_EVTQ_SIZE 512
/* Event msg */
struct csio_evt_msg {
struct list_head list; /* evt queue*/
enum csio_evt type;
uint8_t data[CSIO_EVT_MSG_SIZE];
};
enum {
SERNUM_LEN = 16, /* Serial # length */
EC_LEN = 16, /* E/C length */
ID_LEN = 16, /* ID length */
};
enum {
SF_SIZE = SF_SEC_SIZE * 16, /* serial flash size */
};
/* serial flash and firmware constants */
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/pci.h`, `linux/device.h`, `linux/workqueue.h`, `linux/compiler.h`, `linux/cdev.h`, `linux/list.h`, `linux/mempool.h`.
- Detected declarations: `struct csio_msix_entries`, `struct csio_scsi_qset`, `struct csio_scsi_cpu_info`, `struct csio_evt_msg`, `struct csio_mgmtm_stats`, `struct csio_mgmtm`, `struct csio_adap_desc`, `struct pci_params`, `struct csio_hw_params`, `struct csio_vpd`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.