drivers/scsi/csiostor/csio_mb.c
Source file repositories/reference/linux-study-clean/drivers/scsi/csiostor/csio_mb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/csiostor/csio_mb.c- Extension
.c- Size
- 48617 bytes
- Lines
- 1691
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/jiffies.hlinux/string.hscsi/scsi_device.hscsi/scsi_transport_fc.hcsio_hw.hcsio_lnode.hcsio_rnode.hcsio_mb.hcsio_wr.h
Detected Declarations
function Copyrightfunction csio_mb_hellofunction csio_mb_process_hello_rspfunction csio_mb_byefunction csio_mb_resetfunction csio_mb_paramsfunction csio_mb_process_read_params_rspfunction csio_mb_ldstfunction csio_mb_caps_configfunction csio_mb_portfunction csio_mb_process_read_port_rspfunction csio_mb_initializefunction csio_mb_iq_allocfunction csio_mb_iq_writefunction csio_mb_iq_alloc_writefunction csio_mb_iq_alloc_write_rspfunction csio_mb_iq_freefunction csio_mb_eq_ofld_allocfunction csio_mb_eq_ofld_writefunction csio_mb_eq_ofld_alloc_writefunction csio_mb_eq_ofld_alloc_write_rspfunction csio_mb_eq_ofld_freefunction csio_write_fcoe_link_cond_init_mbfunction informationfunction firmwarefunction csio_fcoe_vnp_read_init_mbfunction firmwarefunction csio_fcoe_read_fcf_init_mbfunction csio_fcoe_read_portparams_init_mbfunction csio_mb_process_portparams_rspfunction csio_mb_intr_enablefunction csio_mb_intr_disablefunction csio_mb_dump_fw_dbgfunction csio_mb_debug_cmd_handlerfunction csio_mb_issuefunction csio_mb_completionsfunction csio_mb_portmod_changedfunction csio_mb_fwevt_handlerfunction csio_mb_isr_handlerfunction csio_mb_tmo_handlerfunction csio_mb_cancel_allfunction list_for_eachfunction csio_mbm_initfunction csio_mbm_exit
Annotated Snippet
while (nparams--) {
temp_params = *params++;
temp_val = *val++;
*p++ = htonl(temp_params);
*p++ = htonl(temp_val);
}
} else {
for (i = 0; i < nparams; i++, p += 2) {
temp_params = *params++;
*p = htonl(temp_params);
}
}
}
/*
* csio_mb_process_read_params_rsp - FW PARAMS response processing helper
* @hw: The HW structure
* @mbp: Mailbox structure
* @retval: Mailbox return value from Firmware
* @nparams: Number of parameters
* @val: Parameter value array.
*
*/
void
csio_mb_process_read_params_rsp(struct csio_hw *hw, struct csio_mb *mbp,
enum fw_retval *retval, unsigned int nparams,
u32 *val)
{
struct fw_params_cmd *rsp = (struct fw_params_cmd *)(mbp->mb);
uint32_t i;
__be32 *p = &rsp->param[0].val;
*retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16));
if (*retval == FW_SUCCESS)
for (i = 0; i < nparams; i++, p += 2)
*val++ = ntohl(*p);
}
/*
* csio_mb_ldst - FW LDST command
* @hw: The HW structure
* @mbp: Mailbox structure
* @tmo: timeout
* @reg: register
*
*/
void
csio_mb_ldst(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, int reg)
{
struct fw_ldst_cmd *ldst_cmd = (struct fw_ldst_cmd *)(mbp->mb);
CSIO_INIT_MBP(mbp, ldst_cmd, tmo, hw, NULL, 1);
/*
* Construct and send the Firmware LDST Command to retrieve the
* specified PCI-E Configuration Space register.
*/
ldst_cmd->op_to_addrspace =
htonl(FW_CMD_OP_V(FW_LDST_CMD) |
FW_CMD_REQUEST_F |
FW_CMD_READ_F |
FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_FUNC_PCIE));
ldst_cmd->cycles_to_len16 = htonl(FW_LEN16(struct fw_ldst_cmd));
ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS_V(1);
ldst_cmd->u.pcie.ctrl_to_fn =
(FW_LDST_CMD_LC_F | FW_LDST_CMD_FN_V(hw->pfn));
ldst_cmd->u.pcie.r = (uint8_t)reg;
}
/*
*
* csio_mb_caps_config - FW Read/Write Capabilities command helper
* @hw: The HW structure
* @mbp: Mailbox structure
* @wr: Write if 1, Read if 0
* @init: Turn on initiator mode.
* @tgt: Turn on target mode.
* @cofld: If 1, Control Offload for FCoE
* @cbfn: Callback, if any.
*
* This helper assumes that cmdp has MB payload from a previous CAPS
* read command.
*/
void
csio_mb_caps_config(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
bool wr, bool init, bool tgt, bool cofld,
void (*cbfn) (struct csio_hw *, struct csio_mb *))
{
Annotation
- Immediate include surface: `linux/delay.h`, `linux/jiffies.h`, `linux/string.h`, `scsi/scsi_device.h`, `scsi/scsi_transport_fc.h`, `csio_hw.h`, `csio_lnode.h`, `csio_rnode.h`.
- Detected declarations: `function Copyright`, `function csio_mb_hello`, `function csio_mb_process_hello_rsp`, `function csio_mb_bye`, `function csio_mb_reset`, `function csio_mb_params`, `function csio_mb_process_read_params_rsp`, `function csio_mb_ldst`, `function csio_mb_caps_config`, `function csio_mb_port`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.