drivers/scsi/csiostor/csio_wr.c
Source file repositories/reference/linux-study-clean/drivers/scsi/csiostor/csio_wr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/csiostor/csio_wr.c- Extension
.c- Size
- 46455 bytes
- Lines
- 1719
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/string.hlinux/compiler.hlinux/slab.hasm/page.hlinux/cache.ht4_values.hcsio_hw.hcsio_wr.hcsio_mb.hcsio_defs.h
Detected Declarations
function csio_get_flbuf_sizefunction csio_wr_fl_bufszfunction csio_wr_qstat_pgszfunction csio_wr_ring_fldbfunction csio_wr_sge_intr_enablefunction csio_wr_fill_flfunction csio_wr_update_flfunction freelistfunction csio_wr_iq_create_rspfunction csio_wr_iq_createfunction csio_wr_eq_cfg_rspfunction FW_EQ_OFLD_CMDfunction FW_IQ_CMDfunction csio_wr_iq_destroyfunction FW_OFLD_EQ_CMDfunction csio_wr_eq_destroyfunction csio_wr_cleanup_eq_stpgfunction csio_wr_cleanup_iq_ftrfunction csio_wr_destroy_queuesfunction csio_wr_getfunction csio_wr_copy_to_wrpfunction csio_wr_issuefunction csio_wr_avail_qcreditsfunction csio_wr_inval_flq_buffunction csio_wr_process_flfunction csio_is_new_iqwrfunction csio_wr_process_iqfunction csio_wr_process_iq_idxfunction csio_closest_timerfunction csio_closest_threshfunction csio_wr_fixup_host_paramsfunction csio_wr_set_sgefunction csio_init_intr_coalesce_parmsfunction csio_wr_get_sgefunction csio_wr_set_sgefunction csio_wr_sge_initfunction csio_wrm_initfunction csio_wrm_exit
Annotated Snippet
if (!buf->vaddr) {
csio_err(hw, "Could only fill %d buffers!\n", n + 1);
return -ENOMEM;
}
paddr = buf->paddr | (sreg & 0xF);
*d++ = cpu_to_be64(paddr);
buf++;
}
return 0;
}
/*
* csio_wr_update_fl -
* @hw: HW module.
* @flq: Freelist queue.
*
*
*/
static inline void
csio_wr_update_fl(struct csio_hw *hw, struct csio_q *flq, uint16_t n)
{
flq->inc_idx += n;
flq->pidx += n;
if (unlikely(flq->pidx >= flq->credits))
flq->pidx -= (uint16_t)flq->credits;
CSIO_INC_STATS(flq, n_flq_refill);
}
/*
* csio_wr_alloc_q - Allocate a WR queue and initialize it.
* @hw: HW module
* @qsize: Size of the queue in bytes
* @wrsize: Since of WR in this queue, if fixed.
* @type: Type of queue (Ingress/Egress/Freelist)
* @owner: Module that owns this queue.
* @nflb: Number of freelist buffers for FL.
* @sreg: What is the FL buffer size register?
* @iq_int_handler: Ingress queue handler in INTx mode.
*
* This function allocates and sets up a queue for the caller
* of size qsize, aligned at the required boundary. This is subject to
* be free entries being available in the queue array. If one is found,
* it is initialized with the allocated queue, marked as being used (owner),
* and a handle returned to the caller in form of the queue's index
* into the q_arr array.
* If user has indicated a freelist (by specifying nflb > 0), create
* another queue (with its own index into q_arr) for the freelist. Allocate
* memory for DMA buffer metadata (vaddr, len etc). Save off the freelist
* idx in the ingress queue's flq.idx. This is how a Freelist is associated
* with its owning ingress queue.
*/
int
csio_wr_alloc_q(struct csio_hw *hw, uint32_t qsize, uint32_t wrsize,
uint16_t type, void *owner, uint32_t nflb, int sreg,
iq_handler_t iq_intx_handler)
{
struct csio_wrm *wrm = csio_hw_to_wrm(hw);
struct csio_q *q, *flq;
int free_idx = wrm->free_qidx;
int ret_idx = free_idx;
uint32_t qsz;
int flq_idx;
if (free_idx >= wrm->num_q) {
csio_err(hw, "No more free queues.\n");
return -1;
}
switch (type) {
case CSIO_EGRESS:
qsz = ALIGN(qsize, CSIO_QCREDIT_SZ) + csio_wr_qstat_pgsz(hw);
break;
case CSIO_INGRESS:
switch (wrsize) {
case 16:
case 32:
case 64:
case 128:
break;
default:
csio_err(hw, "Invalid Ingress queue WR size:%d\n",
wrsize);
return -1;
}
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/string.h`, `linux/compiler.h`, `linux/slab.h`, `asm/page.h`, `linux/cache.h`, `t4_values.h`, `csio_hw.h`.
- Detected declarations: `function csio_get_flbuf_size`, `function csio_wr_fl_bufsz`, `function csio_wr_qstat_pgsz`, `function csio_wr_ring_fldb`, `function csio_wr_sge_intr_enable`, `function csio_wr_fill_fl`, `function csio_wr_update_fl`, `function freelist`, `function csio_wr_iq_create_rsp`, `function csio_wr_iq_create`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.