drivers/scsi/cxgbi/cxgb3i/cxgb3i.h

File Facts

System

Linux kernel

Corpus path

drivers/scsi/cxgbi/cxgb3i/cxgb3i.h

Extension

.h

Size

1492 bytes

Lines

63

Domain

Driver Families

Bucket

drivers/scsi

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct cpl_iscsi_hdr_norss
• struct cpl_rx_data_ddp_norss
• function cxgb3i_get_private_ipv4addr
• function cxgb3i_set_private_ipv4addr

Annotated Snippet

struct cpl_iscsi_hdr_norss {
	union opcode_tid ot;
	u16 pdu_len_ddp;
	u16 len;
	u32 seq;
	u16 urg;
	u8 rsvd;
	u8 status;
};

struct cpl_rx_data_ddp_norss {
	union opcode_tid ot;
	u16 urg;
	u16 len;
	u32 seq;
	u32 nxt_seq;
	u32 ulp_crc;
	u32 ddp_status;
};
#endif

Annotation

• Detected declarations: `struct cpl_iscsi_hdr_norss`, `struct cpl_rx_data_ddp_norss`, `function cxgb3i_get_private_ipv4addr`, `function cxgb3i_set_private_ipv4addr`.
• Atlas domain: Driver Families / drivers/scsi.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.