drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
Source file repositories/reference/linux-study-clean/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c- Extension
.c- Size
- 54928 bytes
- Lines
- 1819
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hisi_sas.h
Detected Declarations
struct hisi_sas_complete_v1_hdrstruct hisi_sas_err_record_v1function hisi_sas_read32function hisi_sas_write32function hisi_sas_phy_write32function hisi_sas_phy_read32function config_phy_opt_mode_v1_hwfunction config_tx_tfe_autoneg_v1_hwfunction config_id_frame_v1_hwfunction setup_itct_v1_hwfunction clear_itct_v1_hwfunction reset_hw_v1_hwfunction init_reg_v1_hwfunction hw_init_v1_hwfunction enable_phy_v1_hwfunction disable_phy_v1_hwfunction start_phy_v1_hwfunction phy_hard_reset_v1_hwfunction start_phys_v1_hwfunction phys_init_v1_hwfunction sl_notify_ssp_v1_hwfunction phy_get_max_linkrate_v1_hwfunction phy_set_linkrate_v1_hwfunction get_wideport_bitmap_v1_hwfunction start_delivery_v1_hwfunction list_for_each_entry_safefunction prep_prd_sge_v1_hwfunction for_each_sgfunction prep_smp_v1_hwfunction prep_ssp_v1_hwfunction slot_err_v1_hwfunction slot_complete_v1_hwfunction int_phyup_v1_hwfunction int_bcast_v1_hwfunction int_abnormal_v1_hwfunction cq_interrupt_v1_hwfunction fatal_ecc_int_v1_hwfunction fatal_axi_int_v1_hwfunction interrupt_init_v1_hwfunction interrupt_openall_v1_hwfunction hisi_sas_v1_initfunction check_fw_info_v1_hwfunction hisi_sas_v1_probe
Annotated Snippet
struct hisi_sas_complete_v1_hdr {
__le32 data;
};
struct hisi_sas_err_record_v1 {
/* dw0 */
__le32 dma_err_type;
/* dw1 */
__le32 trans_tx_fail_type;
/* dw2 */
__le32 trans_rx_fail_type;
/* dw3 */
u32 rsvd;
};
enum {
HISI_SAS_PHY_BCAST_ACK = 0,
HISI_SAS_PHY_SL_PHY_ENABLED,
HISI_SAS_PHY_INT_ABNORMAL,
HISI_SAS_PHY_INT_NR
};
enum {
DMA_TX_ERR_BASE = 0x0,
DMA_RX_ERR_BASE = 0x100,
TRANS_TX_FAIL_BASE = 0x200,
TRANS_RX_FAIL_BASE = 0x300,
/* dma tx */
DMA_TX_DIF_CRC_ERR = DMA_TX_ERR_BASE, /* 0x0 */
DMA_TX_DIF_APP_ERR, /* 0x1 */
DMA_TX_DIF_RPP_ERR, /* 0x2 */
DMA_TX_AXI_BUS_ERR, /* 0x3 */
DMA_TX_DATA_SGL_OVERFLOW_ERR, /* 0x4 */
DMA_TX_DIF_SGL_OVERFLOW_ERR, /* 0x5 */
DMA_TX_UNEXP_XFER_RDY_ERR, /* 0x6 */
DMA_TX_XFER_RDY_OFFSET_ERR, /* 0x7 */
DMA_TX_DATA_UNDERFLOW_ERR, /* 0x8 */
DMA_TX_XFER_RDY_LENGTH_OVERFLOW_ERR, /* 0x9 */
/* dma rx */
DMA_RX_BUFFER_ECC_ERR = DMA_RX_ERR_BASE, /* 0x100 */
DMA_RX_DIF_CRC_ERR, /* 0x101 */
DMA_RX_DIF_APP_ERR, /* 0x102 */
DMA_RX_DIF_RPP_ERR, /* 0x103 */
DMA_RX_RESP_BUFFER_OVERFLOW_ERR, /* 0x104 */
DMA_RX_AXI_BUS_ERR, /* 0x105 */
DMA_RX_DATA_SGL_OVERFLOW_ERR, /* 0x106 */
DMA_RX_DIF_SGL_OVERFLOW_ERR, /* 0x107 */
DMA_RX_DATA_OFFSET_ERR, /* 0x108 */
DMA_RX_UNEXP_RX_DATA_ERR, /* 0x109 */
DMA_RX_DATA_OVERFLOW_ERR, /* 0x10a */
DMA_RX_DATA_UNDERFLOW_ERR, /* 0x10b */
DMA_RX_UNEXP_RETRANS_RESP_ERR, /* 0x10c */
/* trans tx */
TRANS_TX_RSVD0_ERR = TRANS_TX_FAIL_BASE, /* 0x200 */
TRANS_TX_PHY_NOT_ENABLE_ERR, /* 0x201 */
TRANS_TX_OPEN_REJCT_WRONG_DEST_ERR, /* 0x202 */
TRANS_TX_OPEN_REJCT_ZONE_VIOLATION_ERR, /* 0x203 */
TRANS_TX_OPEN_REJCT_BY_OTHER_ERR, /* 0x204 */
TRANS_TX_RSVD1_ERR, /* 0x205 */
TRANS_TX_OPEN_REJCT_AIP_TIMEOUT_ERR, /* 0x206 */
TRANS_TX_OPEN_REJCT_STP_BUSY_ERR, /* 0x207 */
TRANS_TX_OPEN_REJCT_PROTOCOL_NOT_SUPPORT_ERR, /* 0x208 */
TRANS_TX_OPEN_REJCT_RATE_NOT_SUPPORT_ERR, /* 0x209 */
TRANS_TX_OPEN_REJCT_BAD_DEST_ERR, /* 0x20a */
TRANS_TX_OPEN_BREAK_RECEIVE_ERR, /* 0x20b */
TRANS_TX_LOW_PHY_POWER_ERR, /* 0x20c */
TRANS_TX_OPEN_REJCT_PATHWAY_BLOCKED_ERR, /* 0x20d */
TRANS_TX_OPEN_TIMEOUT_ERR, /* 0x20e */
TRANS_TX_OPEN_REJCT_NO_DEST_ERR, /* 0x20f */
TRANS_TX_OPEN_RETRY_ERR, /* 0x210 */
TRANS_TX_RSVD2_ERR, /* 0x211 */
TRANS_TX_BREAK_TIMEOUT_ERR, /* 0x212 */
TRANS_TX_BREAK_REQUEST_ERR, /* 0x213 */
TRANS_TX_BREAK_RECEIVE_ERR, /* 0x214 */
TRANS_TX_CLOSE_TIMEOUT_ERR, /* 0x215 */
TRANS_TX_CLOSE_NORMAL_ERR, /* 0x216 */
TRANS_TX_CLOSE_PHYRESET_ERR, /* 0x217 */
TRANS_TX_WITH_CLOSE_DWS_TIMEOUT_ERR, /* 0x218 */
TRANS_TX_WITH_CLOSE_COMINIT_ERR, /* 0x219 */
TRANS_TX_NAK_RECEIVE_ERR, /* 0x21a */
TRANS_TX_ACK_NAK_TIMEOUT_ERR, /* 0x21b */
TRANS_TX_CREDIT_TIMEOUT_ERR, /* 0x21c */
TRANS_TX_IPTT_CONFLICT_ERR, /* 0x21d */
TRANS_TX_TXFRM_TYPE_ERR, /* 0x21e */
Annotation
- Immediate include surface: `hisi_sas.h`.
- Detected declarations: `struct hisi_sas_complete_v1_hdr`, `struct hisi_sas_err_record_v1`, `function hisi_sas_read32`, `function hisi_sas_write32`, `function hisi_sas_phy_write32`, `function hisi_sas_phy_read32`, `function config_phy_opt_mode_v1_hw`, `function config_tx_tfe_autoneg_v1_hw`, `function config_id_frame_v1_hw`, `function setup_itct_v1_hw`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.