drivers/scsi/isci/phy.c
Source file repositories/reference/linux-study-clean/drivers/scsi/isci/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/isci/phy.c- Extension
.c- Size
- 47176 bytes
- Lines
- 1483
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
isci.hhost.hphy.hscu_event_codes.hprobe_roms.h
Detected Declarations
function sci_phy_linkratefunction sci_phy_transport_layer_initializationfunction sci_phy_link_layer_initializationfunction phy_sata_timeoutfunction phy_get_non_dummy_portfunction sci_phy_set_portfunction sci_phy_initializefunction sci_phy_setup_transportfunction sci_phy_suspendfunction sci_phy_resumefunction sci_phy_get_sas_addressfunction sci_phy_get_attached_sas_addressfunction sci_phy_get_protocolsfunction sci_phy_startfunction sci_phy_stopfunction sci_phy_resetfunction sci_phy_consume_power_handlerfunction sci_phy_start_sas_link_trainingfunction sci_phy_start_sata_link_trainingfunction sci_phy_complete_link_trainingfunction phy_to_hostfunction sci_phy_event_handlerfunction sci_phy_frame_handlerfunction sci_phy_starting_initial_substate_enterfunction sci_phy_starting_await_sas_power_substate_enterfunction sci_phy_starting_await_sas_power_substate_exitfunction sci_phy_starting_await_sata_power_substate_enterfunction sci_phy_starting_await_sata_power_substate_exitfunction sci_phy_starting_await_sata_phy_substate_enterfunction sci_phy_starting_await_sata_phy_substate_exitfunction sci_phy_starting_await_sata_speed_substate_enterfunction sci_phy_starting_await_sata_speed_substate_exitfunction sci_phy_starting_await_sig_fis_uf_substate_enterfunction sci_phy_starting_await_sig_fis_uf_substate_exitfunction sci_phy_starting_final_substate_enterfunction scu_link_layer_stop_protocol_enginefunction scu_link_layer_start_oobfunction scu_link_layer_tx_hard_resetfunction sci_phy_stopped_state_enterfunction sci_phy_starting_state_enterfunction sci_phy_ready_state_enterfunction sci_phy_ready_state_exitfunction sci_phy_resetting_state_enterfunction sci_phy_constructfunction isci_phy_initfunction isci_phy_control
Annotated Snippet
if (sas_spread) {
en_sas = true;
sas_type = ihost->oem_parameters.controller.ssc_sas_tx_type;
}
}
if (en_sas) {
u32 reg;
reg = readl(&xcvr->afe_xcvr_control0);
reg |= (0x00100000 | (sas_type << 19));
writel(reg, &xcvr->afe_xcvr_control0);
reg = readl(&xcvr->afe_tx_ssc_control);
reg |= sas_spread << 8;
writel(reg, &xcvr->afe_tx_ssc_control);
}
if (en_sata) {
u32 reg;
reg = readl(&xcvr->afe_tx_ssc_control);
reg |= sata_spread;
writel(reg, &xcvr->afe_tx_ssc_control);
reg = readl(&llr->stp_control);
reg |= 1 << 12;
writel(reg, &llr->stp_control);
}
}
/* The SAS specification indicates that the phy_capabilities that
* are transmitted shall have an even parity. Calculate the parity.
*/
parity_check = phy_cap.all;
while (parity_check != 0) {
if (parity_check & 0x1)
parity_count++;
parity_check >>= 1;
}
/* If parity indicates there are an odd number of bits set, then
* set the parity bit to 1 in the phy capabilities.
*/
if ((parity_count % 2) != 0)
phy_cap.parity = 1;
writel(phy_cap.all, &llr->phy_capabilities);
/* Set the enable spinup period but disable the ability to send
* notify enable spinup
*/
writel(SCU_ENSPINUP_GEN_VAL(COUNT,
phy_user->notify_enable_spin_up_insertion_frequency),
&llr->notify_enable_spinup_control);
/* Write the ALIGN Insertion Ferequency for connected phy and
* inpendent of connected state
*/
clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED,
phy_user->in_connection_align_insertion_frequency);
clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL,
phy_user->align_insertion_frequency);
writel(clksm_value, &llr->clock_skew_management);
if (is_c0(ihost->pdev) || is_c1(ihost->pdev)) {
writel(0x04210400, &llr->afe_lookup_table_control);
writel(0x020A7C05, &llr->sas_primitive_timeout);
} else
writel(0x02108421, &llr->afe_lookup_table_control);
llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT,
(u8)ihost->user_parameters.no_outbound_task_timeout);
switch (phy_user->max_speed_generation) {
case SCIC_SDS_PARM_GEN3_SPEED:
link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3;
break;
case SCIC_SDS_PARM_GEN2_SPEED:
link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2;
break;
default:
link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1;
break;
}
llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate);
writel(llctl, &llr->link_layer_control);
Annotation
- Immediate include surface: `isci.h`, `host.h`, `phy.h`, `scu_event_codes.h`, `probe_roms.h`.
- Detected declarations: `function sci_phy_linkrate`, `function sci_phy_transport_layer_initialization`, `function sci_phy_link_layer_initialization`, `function phy_sata_timeout`, `function phy_get_non_dummy_port`, `function sci_phy_set_port`, `function sci_phy_initialize`, `function sci_phy_setup_transport`, `function sci_phy_suspend`, `function sci_phy_resume`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.