drivers/scsi/mpi3mr/mpi/mpi30_transport.h

Source file repositories/reference/linux-study-clean/drivers/scsi/mpi3mr/mpi/mpi30_transport.h

File Facts

System: Linux kernel
Corpus path: drivers/scsi/mpi3mr/mpi/mpi30_transport.h
Extension: .h
Size: 27929 bytes
Lines: 491
Domain: Driver Families
Bucket: drivers/scsi
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Touches IRQ or DMA behavior; this matters for the representative real-device path.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

struct mpi3_version_struct
struct mpi3_sysif_oper_queue_indexes
struct mpi3_sysif_registers
struct mpi3_default_reply_descriptor
struct mpi3_address_reply_descriptor
struct mpi3_success_reply_descriptor
struct mpi3_target_command_buffer_reply_descriptor
struct mpi3_status_reply_descriptor
struct mpi3_sge_common
struct mpi3_sge_bit_bucket
struct mpi3_sge_extended_eedp
struct mpi3_request_header
struct mpi3_default_reply

Annotated Snippet

struct mpi3_version_struct {
	u8         dev;
	u8         unit;
	u8         minor;
	u8         major;
};

union mpi3_version_union {
	struct mpi3_version_struct     mpi3_version;
	__le32                     word;
};

#define MPI3_VERSION_MAJOR                                              (3)
#define MPI3_VERSION_MINOR                                              (0)
#define MPI3_VERSION_UNIT                                               (39)
#define MPI3_VERSION_DEV                                                (0)
#define MPI3_DEVHANDLE_INVALID                                          (0xffff)
struct mpi3_sysif_oper_queue_indexes {
	__le16         producer_index;
	__le16         reserved02;
	__le16         consumer_index;
	__le16         reserved06;
};

struct mpi3_sysif_registers {
	__le64                             ioc_information;
	union mpi3_version_union              version;
	__le32                             reserved0c[2];
	__le32                             ioc_configuration;
	__le32                             reserved18;
	__le32                             ioc_status;
	__le32                             reserved20;
	__le32                             admin_queue_num_entries;
	__le64                             admin_request_queue_address;
	__le64                             admin_reply_queue_address;
	__le32                             reserved38[2];
	__le32                             coalesce_control;
	__le32                             reserved44[1007];
	__le16                             admin_request_queue_pi;
	__le16                             reserved1002;
	__le16                             admin_reply_queue_ci;
	__le16                             reserved1006;
	struct mpi3_sysif_oper_queue_indexes   oper_queue_indexes[383];
	__le32                             reserved1c00;
	__le32                             write_sequence;
	__le32                             host_diagnostic;
	__le32                             reserved1c0c;
	__le32                             fault;
	__le32                             fault_info[3];
	__le32                             reserved1c20[4];
	__le64                             hcb_address;
	__le32                             hcb_size;
	__le32                             reserved1c3c;
	__le32                             reply_free_host_index;
	__le32                             sense_buffer_free_host_index;
	__le32                             reserved1c48[2];
	__le64                             diag_rw_data;
	__le64                             diag_rw_address;
	__le16                             diag_rw_control;
	__le16                             diag_rw_status;
	__le32                             reserved1c64[35];
	__le32                             scratchpad[4];
	__le32                             reserved1d00[192];
	__le32                             device_assigned_registers[2048];
};

#define MPI3_SYSIF_IOC_INFO_LOW_OFFSET                                  (0x00000000)
#define MPI3_SYSIF_IOC_INFO_HIGH_OFFSET                                 (0x00000004)
#define MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_MASK                            (0xff000000)
#define MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_SHIFT                           (24)
#define MPI3_SYSIF_IOC_INFO_LOW_HCB_DISABLED                            (0x00000001)
#define MPI3_SYSIF_IOC_CONFIG_OFFSET                                    (0x00000014)
#define MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ                           (0x00f00000)
#define MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ_SHIFT                     (20)
#define MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ                           (0x000f0000)
#define MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ_SHIFT                     (16)
#define MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_SHIFT				(14)
#define MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_MASK                             (0x0000c000)
#define MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_NO                               (0x00000000)
#define MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_NORMAL                           (0x00004000)
#define MPI3_SYSIF_IOC_CONFIG_DEVICE_SHUTDOWN_SEND_REQ                  (0x00002000)
#define MPI3_SYSIF_IOC_CONFIG_DIAG_SAVE                                 (0x00000010)
#define MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC                                (0x00000001)
#define MPI3_SYSIF_IOC_STATUS_OFFSET                                    (0x0000001c)
#define MPI3_SYSIF_IOC_STATUS_RESET_HISTORY                             (0x00000010)
#define MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK                             (0x0000000c)
#define MPI3_SYSIF_IOC_STATUS_SHUTDOWN_SHIFT                            (0x00000002)
#define MPI3_SYSIF_IOC_STATUS_SHUTDOWN_NONE                             (0x00000000)
#define MPI3_SYSIF_IOC_STATUS_SHUTDOWN_IN_PROGRESS                      (0x00000004)
#define MPI3_SYSIF_IOC_STATUS_SHUTDOWN_COMPLETE                         (0x00000008)

Annotation

Detected declarations: `struct mpi3_version_struct`, `struct mpi3_sysif_oper_queue_indexes`, `struct mpi3_sysif_registers`, `struct mpi3_default_reply_descriptor`, `struct mpi3_address_reply_descriptor`, `struct mpi3_success_reply_descriptor`, `struct mpi3_target_command_buffer_reply_descriptor`, `struct mpi3_status_reply_descriptor`, `struct mpi3_sge_common`, `struct mpi3_sge_bit_bucket`.
Atlas domain: Driver Families / drivers/scsi.
Implementation status: source implementation candidate.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.