drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h
Source file repositories/reference/linux-study-clean/drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h- Extension
.h- Size
- 173745 bytes
- Lines
- 4014
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef MPI2_CNFG_H
#define MPI2_CNFG_H
/*****************************************************************************
* Configuration Page Header and defines
*****************************************************************************/
/*Config Page Header */
typedef struct _MPI2_CONFIG_PAGE_HEADER {
U8 PageVersion; /*0x00 */
U8 PageLength; /*0x01 */
U8 PageNumber; /*0x02 */
U8 PageType; /*0x03 */
} MPI2_CONFIG_PAGE_HEADER, *PTR_MPI2_CONFIG_PAGE_HEADER,
Mpi2ConfigPageHeader_t, *pMpi2ConfigPageHeader_t;
typedef union _MPI2_CONFIG_PAGE_HEADER_UNION {
MPI2_CONFIG_PAGE_HEADER Struct;
U8 Bytes[4];
U16 Word16[2];
U32 Word32;
} MPI2_CONFIG_PAGE_HEADER_UNION, *PTR_MPI2_CONFIG_PAGE_HEADER_UNION,
Mpi2ConfigPageHeaderUnion, *pMpi2ConfigPageHeaderUnion;
/*Extended Config Page Header */
typedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER {
U8 PageVersion; /*0x00 */
U8 Reserved1; /*0x01 */
U8 PageNumber; /*0x02 */
U8 PageType; /*0x03 */
U16 ExtPageLength; /*0x04 */
U8 ExtPageType; /*0x06 */
U8 Reserved2; /*0x07 */
} MPI2_CONFIG_EXTENDED_PAGE_HEADER,
*PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER,
Mpi2ConfigExtendedPageHeader_t,
*pMpi2ConfigExtendedPageHeader_t;
typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION {
MPI2_CONFIG_PAGE_HEADER Struct;
MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext;
U8 Bytes[8];
U16 Word16[4];
U32 Word32[2];
} MPI2_CONFIG_EXT_PAGE_HEADER_UNION,
*PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION,
Mpi2ConfigPageExtendedHeaderUnion,
*pMpi2ConfigPageExtendedHeaderUnion;
/*PageType field values */
#define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00)
#define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10)
#define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20)
#define MPI2_CONFIG_PAGEATTR_MASK (0xF0)
#define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00)
#define MPI2_CONFIG_PAGETYPE_IOC (0x01)
#define MPI2_CONFIG_PAGETYPE_BIOS (0x02)
#define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
#define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09)
#define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
#define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F)
#define MPI2_CONFIG_PAGETYPE_MASK (0x0F)
#define MPI2_CONFIG_TYPENUM_MASK (0x0FFF)
/*ExtPageType field values */
#define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10)
#define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
#define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
#define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
#define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14)
#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16)
#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17)
#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18)
#define MPI2_CONFIG_EXTPAGETYPE_ETHERNET (0x19)
#define MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING (0x1A)
#define MPI2_CONFIG_EXTPAGETYPE_PCIE_IO_UNIT (0x1B)
#define MPI2_CONFIG_EXTPAGETYPE_PCIE_SWITCH (0x1C)
#define MPI2_CONFIG_EXTPAGETYPE_PCIE_DEVICE (0x1D)
#define MPI2_CONFIG_EXTPAGETYPE_PCIE_LINK (0x1E)
/*****************************************************************************
* PageAddress defines
*****************************************************************************/
Annotation
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.