drivers/scsi/nsp32_io.h
Source file repositories/reference/linux-study-clean/drivers/scsi/nsp32_io.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/nsp32_io.h- Extension
.h- Size
- 6069 bytes
- Lines
- 260
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
function nsp32_write1function nsp32_read1function nsp32_write2function nsp32_read2function nsp32_write4function nsp32_read4function nsp32_mmio_write1function nsp32_mmio_read1function nsp32_mmio_write2function nsp32_mmio_read2function nsp32_mmio_write4function nsp32_mmio_read4function nsp32_index_read1function nsp32_index_write1function nsp32_index_read2function nsp32_index_write2function nsp32_index_read4function nsp32_index_write4function nsp32_mmio_index_read1function nsp32_mmio_index_write1function nsp32_mmio_index_read2function nsp32_mmio_index_write2function nsp32_multi_read4function nsp32_fifo_readfunction nsp32_multi_write4function nsp32_fifo_write
Annotated Snippet
#ifndef _NSP32_IO_H
#define _NSP32_IO_H
static inline void nsp32_write1(unsigned int base,
unsigned int index,
unsigned char val)
{
outb(val, (base + index));
}
static inline unsigned char nsp32_read1(unsigned int base,
unsigned int index)
{
return inb(base + index);
}
static inline void nsp32_write2(unsigned int base,
unsigned int index,
unsigned short val)
{
outw(val, (base + index));
}
static inline unsigned short nsp32_read2(unsigned int base,
unsigned int index)
{
return inw(base + index);
}
static inline void nsp32_write4(unsigned int base,
unsigned int index,
unsigned long val)
{
outl(val, (base + index));
}
static inline unsigned long nsp32_read4(unsigned int base,
unsigned int index)
{
return inl(base + index);
}
/*==============================================*/
static inline void nsp32_mmio_write1(unsigned long base,
unsigned int index,
unsigned char val)
{
volatile unsigned char *ptr;
ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
writeb(val, ptr);
}
static inline unsigned char nsp32_mmio_read1(unsigned long base,
unsigned int index)
{
volatile unsigned char *ptr;
ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
return readb(ptr);
}
static inline void nsp32_mmio_write2(unsigned long base,
unsigned int index,
unsigned short val)
{
volatile unsigned short *ptr;
ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
writew(cpu_to_le16(val), ptr);
}
static inline unsigned short nsp32_mmio_read2(unsigned long base,
unsigned int index)
{
volatile unsigned short *ptr;
ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
return le16_to_cpu(readw(ptr));
}
static inline void nsp32_mmio_write4(unsigned long base,
unsigned int index,
unsigned long val)
{
Annotation
- Detected declarations: `function nsp32_write1`, `function nsp32_read1`, `function nsp32_write2`, `function nsp32_read2`, `function nsp32_write4`, `function nsp32_read4`, `function nsp32_mmio_write1`, `function nsp32_mmio_read1`, `function nsp32_mmio_write2`, `function nsp32_mmio_read2`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.