drivers/scsi/pcmcia/nsp_cs.h

Source file repositories/reference/linux-study-clean/drivers/scsi/pcmcia/nsp_cs.h

File Facts

System
Linux kernel
Corpus path
drivers/scsi/pcmcia/nsp_cs.h
Extension
.h
Size
11924 bytes
Lines
379
Domain
Driver Families
Bucket
drivers/scsi
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

Header file for nsp_cs.c
      By: YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>

    Ver.1.0 : Cut unused lines.
    Ver 0.1 : Initial version.

    This software may be used and distributed according to the terms of
    the GNU General Public License.

=========================================================*/

#ifndef  __nsp_cs__
#define  __nsp_cs__

/* for debugging */
//#define NSP_DEBUG 9

/*
#define static
#define inline
*/

/************************************
 * Some useful macros...
 */

/* SCSI initiator must be ID 7 */
#define NSP_INITIATOR_ID  7

#define NSP_SELTIMEOUT 200

/***************************************************************************
 * register definitions
 ***************************************************************************/
/*========================================================================
 * base register
 ========================================================================*/
#define	IRQCONTROL	0x00  /* R */
#  define IRQCONTROL_RESELECT_CLEAR     BIT(0)
#  define IRQCONTROL_PHASE_CHANGE_CLEAR BIT(1)
#  define IRQCONTROL_TIMER_CLEAR        BIT(2)
#  define IRQCONTROL_FIFO_CLEAR         BIT(3)
#  define IRQCONTROL_ALLMASK            0xff
#  define IRQCONTROL_ALLCLEAR           (IRQCONTROL_RESELECT_CLEAR     | \
					 IRQCONTROL_PHASE_CHANGE_CLEAR | \
					 IRQCONTROL_TIMER_CLEAR        | \
					 IRQCONTROL_FIFO_CLEAR          )
#  define IRQCONTROL_IRQDISABLE         0xf0

#define	IRQSTATUS	0x00  /* W */
#  define IRQSTATUS_SCSI  BIT(0)
#  define IRQSTATUS_TIMER BIT(2)
#  define IRQSTATUS_FIFO  BIT(3)
#  define IRQSTATUS_MASK  0x0f

#define	IFSELECT	0x01 /* W */
#  define IF_IFSEL    BIT(0)
#  define IF_REGSEL   BIT(2)

#define	FIFOSTATUS	0x01 /* R */
#  define FIFOSTATUS_CHIP_REVISION_MASK 0x0f
#  define FIFOSTATUS_CHIP_ID_MASK       0x70
#  define FIFOSTATUS_FULL_EMPTY         BIT(7)

#define	INDEXREG	0x02 /* R/W */
#define	DATAREG		0x03 /* R/W */
#define	FIFODATA	0x04 /* R/W */
#define	FIFODATA1	0x05 /* R/W */
#define	FIFODATA2	0x06 /* R/W */
#define	FIFODATA3	0x07 /* R/W */

/*====================================================================
 * indexed register
 ====================================================================*/
#define EXTBUSCTRL	0x10 /* R/W,deleted */

#define CLOCKDIV	0x11 /* R/W */
#  define CLOCK_40M 0x02
#  define CLOCK_20M 0x01
#  define FAST_20   BIT(2)

#define TERMPWRCTRL	0x13 /* R/W */
#  define POWER_ON BIT(0)

#define SCSIIRQMODE	0x15 /* R/W */
#  define SCSI_PHASE_CHANGE_EI BIT(0)
#  define RESELECT_EI          BIT(4)
#  define FIFO_IRQ_EI          BIT(5)
#  define SCSI_RESET_IRQ_EI    BIT(6)

Annotation

Implementation Notes