drivers/scsi/pm8001/pm8001_chips.h

File Facts

System

Linux kernel

Corpus path

drivers/scsi/pm8001/pm8001_chips.h

Extension

.h

Size

2926 bytes

Lines

90

Domain

Driver Families

Bucket

drivers/scsi

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• function pm8001_read_32
• function pm8001_write_32
• function pm8001_cr32
• function pm8001_cw32
• function pm8001_mr32
• function pm8001_mw32
• function get_pci_bar_index

Annotated Snippet

switch (pcibar) {
		case 0x18:
		case 0x1C:
			return 1;
		case 0x20:
			return 2;
		case 0x24:
			return 3;
		default:
			return 0;
	}
}

#endif  /* _PM8001_CHIPS_H_ */

Annotation

• Detected declarations: `function pm8001_read_32`, `function pm8001_write_32`, `function pm8001_cr32`, `function pm8001_cw32`, `function pm8001_mr32`, `function pm8001_mw32`, `function get_pci_bar_index`.
• Atlas domain: Driver Families / drivers/scsi.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.