drivers/scsi/qla2xxx/qla_dbg.c

Source file repositories/reference/linux-study-clean/drivers/scsi/qla2xxx/qla_dbg.c

File Facts

System
Linux kernel
Corpus path
drivers/scsi/qla2xxx/qla_dbg.c
Extension
.c
Size
90463 bytes
Lines
2749
Domain
Driver Families
Bucket
drivers/scsi
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

while (timer--) {
			udelay(5);

			if (qla_pci_disconnected(vha, reg))
				return rval;

			stat = rd_reg_dword(&reg->host_status);
			/* Check for pending interrupts. */
			if (!(stat & HSRX_RISC_INT))
				continue;

			stat &= 0xff;
			if (stat != 0x1 && stat != 0x2 &&
			    stat != 0x10 && stat != 0x11) {

				/* Clear this intr; it wasn't a mailbox intr */
				wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
				rd_reg_dword(&reg->hccr);
				continue;
			}

			set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
			rval = rd_reg_word(&reg->mailbox0) & MBS_MASK;
			wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
			rd_reg_dword(&reg->hccr);
			break;
		}
		ha->flags.mbox_int = 1;
		*nxt = ram + i;

		if (!test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) {
			/* no interrupt, timed out*/
			return rval;
		}
		if (rval) {
			/* error completion status */
			return rval;
		}
		for (j = 0; j < dwords; j++) {
			ram[i + j] =
			    (IS_QLA27XX(ha) || IS_QLA28XX(ha)) ?
			    chunk[j] : swab32(chunk[j]);
		}
	}

	*nxt = ram + i;
	return QLA_SUCCESS;
}

int
qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, __be32 *ram,
		 uint32_t ram_dwords, void **nxt)
{
	int rval = QLA_FUNCTION_FAILED;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
	dma_addr_t dump_dma = ha->gid_list_dma;
	uint32_t *chunk = (uint32_t *)ha->gid_list;
	uint32_t dwords = qla2x00_gid_list_size(ha) / 4;
	uint32_t stat;
	ulong i, j, timer = 6000000;
	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);

	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	if (qla_pci_disconnected(vha, reg))
		return rval;

	for (i = 0; i < ram_dwords; i += dwords, addr += dwords) {
		if (i + dwords > ram_dwords)
			dwords = ram_dwords - i;

		wrt_reg_word(&reg->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED);
		wrt_reg_word(&reg->mailbox1, LSW(addr));
		wrt_reg_word(&reg->mailbox8, MSW(addr));
		wrt_reg_word(&reg->mailbox10, 0);

		wrt_reg_word(&reg->mailbox2, MSW(LSD(dump_dma)));
		wrt_reg_word(&reg->mailbox3, LSW(LSD(dump_dma)));
		wrt_reg_word(&reg->mailbox6, MSW(MSD(dump_dma)));
		wrt_reg_word(&reg->mailbox7, LSW(MSD(dump_dma)));

		wrt_reg_word(&reg->mailbox4, MSW(dwords));
		wrt_reg_word(&reg->mailbox5, LSW(dwords));
		wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT);

		ha->flags.mbox_int = 0;
		while (timer--) {
			udelay(5);
			if (qla_pci_disconnected(vha, reg))
				return rval;

Annotation

Implementation Notes