drivers/scsi/qla2xxx/qla_isr.c
Source file repositories/reference/linux-study-clean/drivers/scsi/qla2xxx/qla_isr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/scsi/qla2xxx/qla_isr.c- Extension
.c- Size
- 133215 bytes
- Lines
- 4809
- Domain
- Driver Families
- Bucket
- drivers/scsi
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
qla_def.hqla_target.hqla_gbl.hlinux/delay.hlinux/slab.hlinux/cpu.hlinux/t10-pi.hscsi/scsi_tcq.hscsi/scsi_bsg_fc.hscsi/scsi_eh.hscsi/fc/fc_fs.hlinux/nvme-fc-driver.h
Detected Declarations
struct qla_init_msix_entryfunction qla27xx_process_purex_fpinfunction display_Laser_infofunction qla24xx_process_abtsfunction __qla_consume_iocbfunction __qla_copy_purex_to_bufferfunction qla2100_intr_handlerfunction qla2x00_check_reg32_for_disconnectfunction qla2x00_check_reg16_for_disconnectfunction qla2300_intr_handlerfunction qla2x00_mbx_completionfunction qla81xx_idc_eventfunction qla2x00_get_link_speed_strfunction qla83xx_handle_8200_aenfunction qla27xx_copy_multiple_pktfunction qla2x00_is_a_vp_didfunction qla2x00_find_fcport_by_loopidfunction qla2x00_find_fcport_by_wwpnfunction qla2x00_find_fcport_by_nportidfunction qla27xx_handle_8200_aenfunction qla24xx_alloc_purex_itemfunction qla24xx_queue_purex_itemfunction qla24xx_copy_std_pktfunction qla27xx_copy_fpin_pktfunction qla2x00_async_eventfunction qla2x00_process_completed_requestfunction qla_get_sp_from_handlefunction qla2x00_get_sp_from_handlefunction qla2x00_mbx_iocb_entryfunction qla24xx_mbx_iocb_entryfunction qla24xxx_nack_iocb_entryfunction qla2x00_ct_entryfunction qla24xx_els_ct_entryfunction qla24xx_logio_entryfunction qla24xx_tm_iocb_entryfunction qla24xx_nvme_iocb_entryfunction Failurefunction qla_ctrlvp_completedfunction qla2x00_process_response_entryfunction qla2x00_process_response_queuefunction qla2x00_handle_sensefunction qla2x00_handle_dif_errorfunction scsi_for_each_prot_sgfunction qla25xx_process_bidir_status_iocbfunction qla2x00_status_entryfunction qla2x00_status_cont_entryfunction qla2x00_error_entryfunction qla24xx_mbx_completion
Annotated Snippet
struct qla_init_msix_entry {
const char *name;
irq_handler_t handler;
};
static const struct qla_init_msix_entry msix_entries[] = {
{ "default", qla24xx_msix_default },
{ "rsp_q", qla24xx_msix_rsp_q },
{ "atio_q", qla83xx_msix_atio_q },
{ "qpair_multiq", qla2xxx_msix_rsp_q },
};
static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
{ "qla2xxx (default)", qla82xx_msix_default },
{ "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
};
static int
qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
{
int i, ret;
struct qla_msix_entry *qentry;
scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
int min_vecs = QLA_BASE_VECTORS;
struct irq_affinity desc = {
.pre_vectors = QLA_BASE_VECTORS,
};
if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
IS_ATIO_MSIX_CAPABLE(ha)) {
desc.pre_vectors++;
min_vecs++;
}
if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
/* user wants to control IRQ setting for target mode */
ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
blk_mq_num_online_queues(ha->msix_count) + min_vecs,
PCI_IRQ_MSIX);
} else
ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
blk_mq_num_online_queues(ha->msix_count) + min_vecs,
PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
&desc);
if (ret < 0) {
ql_log(ql_log_fatal, vha, 0x00c7,
"MSI-X: Failed to enable support, "
"giving up -- %d/%d.\n",
ha->msix_count, ret);
goto msix_out;
} else if (ret < ha->msix_count) {
ql_log(ql_log_info, vha, 0x00c6,
"MSI-X: Using %d vectors\n", ret);
ha->msix_count = ret;
/* Recalculate queue values */
if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
ha->max_req_queues = ha->msix_count - 1;
/* ATIOQ needs 1 vector. That's 1 less QPair */
if (QLA_TGT_MODE_ENABLED())
ha->max_req_queues--;
ha->max_rsp_queues = ha->max_req_queues;
ha->max_qpairs = ha->max_req_queues - 1;
ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
"Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
}
}
vha->irq_offset = desc.pre_vectors;
ha->msix_entries = kzalloc_objs(struct qla_msix_entry, ha->msix_count);
if (!ha->msix_entries) {
ql_log(ql_log_fatal, vha, 0x00c8,
"Failed to allocate memory for ha->msix_entries.\n");
ret = -ENOMEM;
goto free_irqs;
}
ha->flags.msix_enabled = 1;
for (i = 0; i < ha->msix_count; i++) {
qentry = &ha->msix_entries[i];
qentry->vector = pci_irq_vector(ha->pdev, i);
qentry->vector_base0 = i;
qentry->entry = i;
qentry->have_irq = 0;
qentry->in_use = 0;
qentry->handle = NULL;
}
Annotation
- Immediate include surface: `qla_def.h`, `qla_target.h`, `qla_gbl.h`, `linux/delay.h`, `linux/slab.h`, `linux/cpu.h`, `linux/t10-pi.h`, `scsi/scsi_tcq.h`.
- Detected declarations: `struct qla_init_msix_entry`, `function qla27xx_process_purex_fpin`, `function display_Laser_info`, `function qla24xx_process_abts`, `function __qla_consume_iocb`, `function __qla_copy_purex_to_buffer`, `function qla2100_intr_handler`, `function qla2x00_check_reg32_for_disconnect`, `function qla2x00_check_reg16_for_disconnect`, `function qla2300_intr_handler`.
- Atlas domain: Driver Families / drivers/scsi.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.