drivers/soc/fsl/qbman/qman.c
Source file repositories/reference/linux-study-clean/drivers/soc/fsl/qbman/qman.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/soc/fsl/qbman/qman.c- Extension
.c- Size
- 80730 bytes
- Lines
- 3072
- Domain
- Driver Families
- Bucket
- drivers/soc
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
qman_priv.h
Detected Declarations
struct qm_eqcr_entrystruct qm_eqcrstruct qm_dqrrstruct qm_mrstruct qm_mcc_fqstruct qm_mcc_cgrstruct qm_mcr_queryfqstruct qm_mcr_alterfqstruct qm_mcstruct qm_addrstruct qm_portalstruct qman_portalstruct update_cgr_paramsenum qm_eqcr_pmodeenum qm_dqrr_dmodeenum qm_dqrr_pmodeenum qm_dqrr_cmodeenum qm_mr_pmodeenum qm_mr_cmodefunction qm_infunction qm_outfunction qm_cl_invalidatefunction qm_cl_touch_rofunction qm_ce_infunction eqcr_ptr2idxfunction eqcr_incfunction qm_eqcr_initfunction qm_eqcr_finishfunction eqcr_commit_checksfunction qm_eqcr_pvb_commitfunction qm_eqcr_cce_prefetchfunction qm_eqcr_cce_updatefunction qm_eqcr_set_ithreshfunction qm_eqcr_get_availfunction qm_eqcr_get_fillfunction dqrr_ptr2idxfunction qm_dqrr_set_maxfillfunction qm_dqrr_initfunction qm_dqrr_finishfunction qm_dqrr_nextfunction qm_dqrr_pvb_updatefunction qm_dqrr_cdc_consume_1ptrfunction qm_dqrr_cdc_consume_nfunction qm_dqrr_sdqcr_setfunction qm_dqrr_vdqcr_setfunction qm_dqrr_set_ithreshfunction mr_ptr2idxfunction qm_mr_init
Annotated Snippet
struct qm_eqcr_entry {
u8 _ncw_verb; /* writes to this are non-coherent */
u8 dca;
__be16 seqnum;
u8 __reserved[4];
__be32 fqid; /* 24-bit */
__be32 tag;
struct qm_fd fd;
u8 __reserved3[32];
} __packed __aligned(8);
#define QM_EQCR_VERB_VBIT 0x80
#define QM_EQCR_VERB_CMD_MASK 0x61 /* but only one value; */
#define QM_EQCR_VERB_CMD_ENQUEUE 0x01
#define QM_EQCR_SEQNUM_NESN 0x8000 /* Advance NESN */
#define QM_EQCR_SEQNUM_NLIS 0x4000 /* More fragments to come */
#define QM_EQCR_SEQNUM_SEQMASK 0x3fff /* sequence number goes here */
struct qm_eqcr {
struct qm_eqcr_entry *ring, *cursor;
u8 ci, available, ithresh, vbit;
#ifdef CONFIG_FSL_DPAA_CHECKING
u32 busy;
enum qm_eqcr_pmode pmode;
#endif
};
struct qm_dqrr {
const struct qm_dqrr_entry *ring, *cursor;
u8 pi, ci, fill, ithresh, vbit;
#ifdef CONFIG_FSL_DPAA_CHECKING
enum qm_dqrr_dmode dmode;
enum qm_dqrr_pmode pmode;
enum qm_dqrr_cmode cmode;
#endif
};
struct qm_mr {
union qm_mr_entry *ring, *cursor;
u8 pi, ci, fill, ithresh, vbit;
#ifdef CONFIG_FSL_DPAA_CHECKING
enum qm_mr_pmode pmode;
enum qm_mr_cmode cmode;
#endif
};
/* MC (Management Command) command */
/* "FQ" command layout */
struct qm_mcc_fq {
u8 _ncw_verb;
u8 __reserved1[3];
__be32 fqid; /* 24-bit */
u8 __reserved2[56];
} __packed;
/* "CGR" command layout */
struct qm_mcc_cgr {
u8 _ncw_verb;
u8 __reserved1[30];
u8 cgid;
u8 __reserved2[32];
};
#define QM_MCC_VERB_VBIT 0x80
#define QM_MCC_VERB_MASK 0x7f /* where the verb contains; */
#define QM_MCC_VERB_INITFQ_PARKED 0x40
#define QM_MCC_VERB_INITFQ_SCHED 0x41
#define QM_MCC_VERB_QUERYFQ 0x44
#define QM_MCC_VERB_QUERYFQ_NP 0x45 /* "non-programmable" fields */
#define QM_MCC_VERB_QUERYWQ 0x46
#define QM_MCC_VERB_QUERYWQ_DEDICATED 0x47
#define QM_MCC_VERB_ALTER_SCHED 0x48 /* Schedule FQ */
#define QM_MCC_VERB_ALTER_FE 0x49 /* Force Eligible FQ */
#define QM_MCC_VERB_ALTER_RETIRE 0x4a /* Retire FQ */
#define QM_MCC_VERB_ALTER_OOS 0x4b /* Take FQ out of service */
#define QM_MCC_VERB_ALTER_FQXON 0x4d /* FQ XON */
#define QM_MCC_VERB_ALTER_FQXOFF 0x4e /* FQ XOFF */
#define QM_MCC_VERB_INITCGR 0x50
#define QM_MCC_VERB_MODIFYCGR 0x51
#define QM_MCC_VERB_CGRTESTWRITE 0x52
#define QM_MCC_VERB_QUERYCGR 0x58
#define QM_MCC_VERB_QUERYCONGESTION 0x59
union qm_mc_command {
struct {
u8 _ncw_verb; /* writes to this are non-coherent */
u8 __reserved[63];
};
struct qm_mcc_initfq initfq;
struct qm_mcc_initcgr initcgr;
struct qm_mcc_fq fq;
struct qm_mcc_cgr cgr;
Annotation
- Immediate include surface: `qman_priv.h`.
- Detected declarations: `struct qm_eqcr_entry`, `struct qm_eqcr`, `struct qm_dqrr`, `struct qm_mr`, `struct qm_mcc_fq`, `struct qm_mcc_cgr`, `struct qm_mcr_queryfq`, `struct qm_mcr_alterfq`, `struct qm_mc`, `struct qm_addr`.
- Atlas domain: Driver Families / drivers/soc.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.