drivers/soc/fsl/qe/qmc.c

Source file repositories/reference/linux-study-clean/drivers/soc/fsl/qe/qmc.c

File Facts

System
Linux kernel
Corpus path
drivers/soc/fsl/qe/qmc.c
Extension
.c
Size
58644 bytes
Lines
2261
Domain
Driver Families
Bucket
drivers/soc
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct qmc_xfer_desc {
	union {
		void (*tx_complete)(void *context);
		void (*rx_complete)(void *context, size_t length, unsigned int flags);
	};
	void *context;
};

struct qmc_chan {
	struct list_head list;
	unsigned int id;
	struct qmc *qmc;
	void __iomem *s_param;
	enum qmc_mode mode;
	spinlock_t	ts_lock; /* Protect timeslots */
	u64	tx_ts_mask_avail;
	u64	tx_ts_mask;
	u64	rx_ts_mask_avail;
	u64	rx_ts_mask;
	bool is_reverse_data;

	spinlock_t	tx_lock; /* Protect Tx related data */
	cbd_t __iomem *txbds;
	cbd_t __iomem *txbd_free;
	cbd_t __iomem *txbd_done;
	struct qmc_xfer_desc tx_desc[QMC_NB_TXBDS];
	u64	nb_tx_underrun;
	bool	is_tx_stopped;

	spinlock_t	rx_lock; /* Protect Rx related data */
	cbd_t __iomem *rxbds;
	cbd_t __iomem *rxbd_free;
	cbd_t __iomem *rxbd_done;
	struct qmc_xfer_desc rx_desc[QMC_NB_RXBDS];
	u64	nb_rx_busy;
	int	rx_pending;
	bool	is_rx_halted;
	bool	is_rx_stopped;
};

enum qmc_version {
	QMC_CPM1,
	QMC_QE,
};

struct qmc_data {
	enum qmc_version version;
	u32 tstate; /* Initial TSTATE value */
	u32 rstate; /* Initial RSTATE value */
	u32 zistate; /* Initial ZISTATE value */
	u32 zdstate_hdlc; /* Initial ZDSTATE value (HDLC mode) */
	u32 zdstate_transp; /* Initial ZDSTATE value (Transparent mode) */
	u32 rpack; /* Initial RPACK value */
};

struct qmc {
	struct device *dev;
	const struct qmc_data *data;
	struct tsa_serial *tsa_serial;
	void __iomem *scc_regs;
	void __iomem *scc_pram;
	void __iomem *dpram;
	u16 scc_pram_offset;
	u32 dpram_offset;
	u32 qe_subblock;
	cbd_t __iomem *bd_table;
	dma_addr_t bd_dma_addr;
	size_t bd_size;
	u16 __iomem *int_table;
	u16 __iomem *int_curr;
	dma_addr_t int_dma_addr;
	size_t int_size;
	bool is_tsa_64rxtx;
	struct list_head chan_head;
	struct qmc_chan *chans[64];
};

static void qmc_write8(void __iomem *addr, u8 val)
{
	iowrite8(val, addr);
}

static void qmc_write16(void __iomem *addr, u16 val)
{
	iowrite16be(val, addr);
}

static u16 qmc_read16(void __iomem *addr)
{
	return ioread16be(addr);

Annotation

Implementation Notes