drivers/soc/fsl/qe/tsa.h
Source file repositories/reference/linux-study-clean/drivers/soc/fsl/qe/tsa.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/soc/fsl/qe/tsa.h- Extension
.h- Size
- 1148 bytes
- Lines
- 46
- Domain
- Driver Families
- Bucket
- drivers/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.h
Detected Declarations
struct device_nodestruct devicestruct tsa_serialstruct tsa_serial_info
Annotated Snippet
struct tsa_serial_info {
unsigned long rx_fs_rate;
unsigned long rx_bit_rate;
u8 nb_rx_ts;
unsigned long tx_fs_rate;
unsigned long tx_bit_rate;
u8 nb_tx_ts;
};
/* Get information */
int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *info);
/* Get serial number */
int tsa_serial_get_num(struct tsa_serial *tsa_serial);
#endif /* __SOC_FSL_TSA_H__ */
Annotation
- Immediate include surface: `linux/types.h`.
- Detected declarations: `struct device_node`, `struct device`, `struct tsa_serial`, `struct tsa_serial_info`.
- Atlas domain: Driver Families / drivers/soc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.