drivers/soc/mediatek/mtk-dvfsrc.c

Source file repositories/reference/linux-study-clean/drivers/soc/mediatek/mtk-dvfsrc.c

File Facts

System
Linux kernel
Corpus path
drivers/soc/mediatek/mtk-dvfsrc.c
Extension
.c
Size
25376 bytes
Lines
879
Domain
Driver Families
Bucket
drivers/soc
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dvfsrc_opp {
	u32 vcore_opp;
	u32 dram_opp;
	u32 emi_opp;
};

struct dvfsrc_opp_desc {
	const struct dvfsrc_opp *opps;
	u32 num_opp;
};

struct dvfsrc_soc_data;
struct mtk_dvfsrc {
	struct device *dev;
	struct clk *clk;
	struct platform_device *icc;
	struct platform_device *regulator;
	const struct dvfsrc_soc_data *dvd;
	const struct dvfsrc_opp_desc *curr_opps;
	void __iomem *regs;
	int dram_type;
};

struct dvfsrc_soc_data {
	const int *regs;
	const u8 *bw_units;
	const bool has_emi_ddr;
	const struct dvfsrc_opp_desc *opps_desc;
	u32 (*calc_dram_bw)(struct mtk_dvfsrc *dvfsrc, enum mtk_dvfsrc_bw_type type, u64 bw);
	u32 (*get_target_level)(struct mtk_dvfsrc *dvfsrc);
	u32 (*get_current_level)(struct mtk_dvfsrc *dvfsrc);
	u32 (*get_vcore_level)(struct mtk_dvfsrc *dvfsrc);
	u32 (*get_vscp_level)(struct mtk_dvfsrc *dvfsrc);
	u32 (*get_opp_count)(struct mtk_dvfsrc *dvfsrc);
	int (*get_hw_opps)(struct mtk_dvfsrc *dvfsrc);
	void (*set_dram_bw)(struct mtk_dvfsrc *dvfsrc, u64 bw);
	void (*set_dram_peak_bw)(struct mtk_dvfsrc *dvfsrc, u64 bw);
	void (*set_dram_hrt_bw)(struct mtk_dvfsrc *dvfsrc, u64 bw);
	void (*set_opp_level)(struct mtk_dvfsrc *dvfsrc, u32 level);
	void (*set_vcore_level)(struct mtk_dvfsrc *dvfsrc, u32 level);
	void (*set_vscp_level)(struct mtk_dvfsrc *dvfsrc, u32 level);
	int (*wait_for_opp_level)(struct mtk_dvfsrc *dvfsrc, u32 level);
	int (*wait_for_vcore_level)(struct mtk_dvfsrc *dvfsrc, u32 level);

	/**
	 * @bw_max_constraints - array of maximum bandwidth for this hardware
	 *
	 * indexed by &enum mtk_dvfsrc_bw_type, storing the maximum permissible
	 * hardware value for each bandwidth type.
	 */
	const u32 *const bw_max_constraints;

	/**
	 * @bw_min_constraints - array of minimum bandwidth for this hardware
	 *
	 * indexed by &enum mtk_dvfsrc_bw_type, storing the minimum permissible
	 * hardware value for each bandwidth type.
	 */
	const u32 *const bw_min_constraints;
};

static u32 dvfsrc_readl(struct mtk_dvfsrc *dvfs, u32 offset)
{
	return readl(dvfs->regs + dvfs->dvd->regs[offset]);
}

static void dvfsrc_writel(struct mtk_dvfsrc *dvfs, u32 offset, u32 val)
{
	writel(val, dvfs->regs + dvfs->dvd->regs[offset]);
}

enum dvfsrc_regs {
	DVFSRC_BASIC_CONTROL,
	DVFSRC_SW_REQ,
	DVFSRC_SW_REQ2,
	DVFSRC_LEVEL,
	DVFSRC_TARGET_LEVEL,
	DVFSRC_SW_BW,
	DVFSRC_SW_PEAK_BW,
	DVFSRC_SW_HRT_BW,
	DVFSRC_SW_EMI_BW,
	DVFSRC_VCORE,
	DVFSRC_TARGET_GEAR,
	DVFSRC_GEAR_INFO_L,
	DVFSRC_GEAR_INFO_H,
	DVFSRC_REGS_MAX,
};

static const int dvfsrc_mt8183_regs[] = {
	[DVFSRC_SW_REQ] = 0x4,

Annotation

Implementation Notes