drivers/soc/mediatek/mtk-svs.c

Source file repositories/reference/linux-study-clean/drivers/soc/mediatek/mtk-svs.c

File Facts

System
Linux kernel
Corpus path
drivers/soc/mediatek/mtk-svs.c
Extension
.c
Size
79522 bytes
Lines
2960
Domain
Driver Families
Bucket
drivers/soc
Inferred role
Driver Families: operation-table or driver-model contract
Status
pattern implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

static const struct file_operations svs_##name##_debug_fops = {	\
		.owner = THIS_MODULE,					\
		.open = svs_##name##_debug_open,			\
		.read = seq_read,					\
		.llseek = seq_lseek,					\
		.release = single_release,				\
	}

#define debug_fops_rw(name)						\
	static int svs_##name##_debug_open(struct inode *inode,		\
					   struct file *filp)		\
	{								\
		return single_open(filp, svs_##name##_debug_show,	\
				   inode->i_private);			\
	}								\
	static const struct file_operations svs_##name##_debug_fops = {	\
		.owner = THIS_MODULE,					\
		.open = svs_##name##_debug_open,			\
		.read = seq_read,					\
		.write = svs_##name##_debug_write,			\
		.llseek = seq_lseek,					\
		.release = single_release,				\
	}

#define svs_dentry_data(name)	{__stringify(name), &svs_##name##_debug_fops}
#endif

/**
 * enum svsb_sw_id - SVS Bank Software ID
 * @SVSB_SWID_CPU_LITTLE: CPU little cluster Bank
 * @SVSB_SWID_CPU_BIG:    CPU big cluster Bank
 * @SVSB_SWID_CCI:        Cache Coherent Interconnect Bank
 * @SVSB_SWID_GPU:        GPU Bank
 * @SVSB_SWID_MAX:        Total number of Banks
 */
enum svsb_sw_id {
	SVSB_SWID_CPU_LITTLE,
	SVSB_SWID_CPU_BIG,
	SVSB_SWID_CCI,
	SVSB_SWID_GPU,
	SVSB_SWID_MAX
};

/**
 * enum svsb_type - SVS Bank 2-line: Type and Role
 * @SVSB_TYPE_NONE: One-line type Bank - Global role
 * @SVSB_TYPE_LOW:  Two-line type Bank - Low bank role
 * @SVSB_TYPE_HIGH: Two-line type Bank - High bank role
 * @SVSB_TYPE_MAX:  Total number of bank types
 */
enum svsb_type {
	SVSB_TYPE_NONE,
	SVSB_TYPE_LOW,
	SVSB_TYPE_HIGH,
	SVSB_TYPE_MAX
};

/**
 * enum svsb_phase - svs bank phase enumeration
 * @SVSB_PHASE_ERROR: svs bank encounters unexpected condition
 * @SVSB_PHASE_INIT01: svs bank basic init for data calibration
 * @SVSB_PHASE_INIT02: svs bank can provide voltages to opp table
 * @SVSB_PHASE_MON: svs bank can provide voltages with thermal effect
 * @SVSB_PHASE_MAX: total number of svs bank phase (debug purpose)
 *
 * Each svs bank has its own independent phase and we enable each svs bank by
 * running their phase orderly. However, when svs bank encounters unexpected
 * condition, it will fire an irq (PHASE_ERROR) to inform svs software.
 *
 * svs bank general phase-enabled order:
 * SVSB_PHASE_INIT01 -> SVSB_PHASE_INIT02 -> SVSB_PHASE_MON
 */
enum svsb_phase {
	SVSB_PHASE_ERROR = 0,
	SVSB_PHASE_INIT01,
	SVSB_PHASE_INIT02,
	SVSB_PHASE_MON,
	SVSB_PHASE_MAX,
};

enum svs_reg_index {
	DESCHAR = 0,
	TEMPCHAR,
	DETCHAR,
	AGECHAR,
	DCCONFIG,
	AGECONFIG,
	FREQPCT30,
	FREQPCT74,
	LIMITVALS,

Annotation

Implementation Notes