drivers/soc/qcom/ubwc_config.c

Source file repositories/reference/linux-study-clean/drivers/soc/qcom/ubwc_config.c

File Facts

System
Linux kernel
Corpus path
drivers/soc/qcom/ubwc_config.c
Extension
.c
Size
10349 bytes
Lines
319
Domain
Driver Families
Bucket
drivers/soc
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
 */

#include <linux/debugfs.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>

#include <linux/soc/qcom/ubwc.h>

static const struct qcom_ubwc_cfg_data no_ubwc_data = {
	/* no UBWC, no HBB */
};

static const struct qcom_ubwc_cfg_data eliza_data = {
	.ubwc_enc_version = UBWC_5_0,
	.ubwc_dec_version = UBWC_5_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.ubwc_bank_spread = true,
	/* TODO: highest_bank_bit = 14 for LP_DDR4 */
	.highest_bank_bit = 15,
	.macrotile_mode = true,
};

static const struct qcom_ubwc_cfg_data kaanapali_data = {
	.ubwc_enc_version = UBWC_6_0,
	.ubwc_dec_version = UBWC_6_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.ubwc_bank_spread = true,
	.highest_bank_bit = 16,
	.macrotile_mode = true,
};

static const struct qcom_ubwc_cfg_data msm8937_data = {
	.ubwc_enc_version = UBWC_1_0,
	.ubwc_dec_version = UBWC_1_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
			UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.highest_bank_bit = 14,
};

static const struct qcom_ubwc_cfg_data msm8998_data = {
	.ubwc_enc_version = UBWC_1_0,
	.ubwc_dec_version = UBWC_1_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
			UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.highest_bank_bit = 15,
};

static const struct qcom_ubwc_cfg_data qcm2290_data = {
	/* no UBWC */
	.highest_bank_bit = 15,
};

static const struct qcom_ubwc_cfg_data sa8775p_data = {
	.ubwc_enc_version = UBWC_4_0,
	.ubwc_dec_version = UBWC_4_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL3,
	.ubwc_bank_spread = true,
	.highest_bank_bit = 13,
	.macrotile_mode = true,
};

static const struct qcom_ubwc_cfg_data sar2130p_data = {
	.ubwc_enc_version = UBWC_3_0, /* 4.0.2 in hw */
	.ubwc_dec_version = UBWC_4_3,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.ubwc_bank_spread = true,
	.highest_bank_bit = 13,
	.macrotile_mode = true,
};

static const struct qcom_ubwc_cfg_data sc7180_data = {
	.ubwc_enc_version = UBWC_2_0,
	.ubwc_dec_version = UBWC_2_0,
	.ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
			UBWC_SWIZZLE_ENABLE_LVL3,
	.ubwc_bank_spread = true,
	.highest_bank_bit = 14,
};

Annotation

Implementation Notes