drivers/soc/samsung/exynos5422-asv.h

File Facts

System

Linux kernel

Corpus path

drivers/soc/samsung/exynos5422-asv.h

Extension

.h

Size

625 bytes

Lines

32

Domain

Driver Families

Bucket

drivers/soc

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/errno.h

Detected Declarations

• struct exynos_asv
• function exynos5422_asv_init

Annotated Snippet

#ifndef __LINUX_SOC_EXYNOS5422_ASV_H
#define __LINUX_SOC_EXYNOS5422_ASV_H

#include <linux/errno.h>

enum {
	EXYNOS_ASV_SUBSYS_ID_ARM,
	EXYNOS_ASV_SUBSYS_ID_KFC,
	EXYNOS_ASV_SUBSYS_ID_MAX
};

struct exynos_asv;

#ifdef CONFIG_EXYNOS_ASV_ARM
int exynos5422_asv_init(struct exynos_asv *asv);
#else
static inline int exynos5422_asv_init(struct exynos_asv *asv)
{
	return -ENOTSUPP;
}
#endif

#endif /* __LINUX_SOC_EXYNOS5422_ASV_H */

Annotation

• Immediate include surface: `linux/errno.h`.
• Detected declarations: `struct exynos_asv`, `function exynos5422_asv_init`.
• Atlas domain: Driver Families / drivers/soc.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.