drivers/soc/samsung/gs101-pmu.c
Source file repositories/reference/linux-study-clean/drivers/soc/samsung/gs101-pmu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/soc/samsung/gs101-pmu.c- Extension
.c- Size
- 16753 bytes
- Lines
- 447
- Domain
- Driver Families
- Bucket
- drivers/soc
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/arm-smccc.hlinux/array_size.hlinux/soc/samsung/exynos-pmu.hlinux/soc/samsung/exynos-regs-pmu.hlinux/regmap.hexynos-pmu.h
Detected Declarations
function tensor_sec_reg_writefunction tensor_sec_reg_rmwfunction tensor_sec_reg_readfunction tensor_set_bits_atomicfunction tensor_is_atomicfunction tensor_sec_update_bits
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2025 Linaro Ltd.
*
* GS101 PMU (Power Management Unit) support
*/
#include <linux/arm-smccc.h>
#include <linux/array_size.h>
#include <linux/soc/samsung/exynos-pmu.h>
#include <linux/soc/samsung/exynos-regs-pmu.h>
#include <linux/regmap.h>
#include "exynos-pmu.h"
#define PMUALIVE_MASK GENMASK(13, 0)
#define TENSOR_SET_BITS (BIT(15) | BIT(14))
#define TENSOR_CLR_BITS BIT(15)
#define TENSOR_SMC_PMU_SEC_REG 0x82000504
#define TENSOR_PMUREG_READ 0
#define TENSOR_PMUREG_WRITE 1
#define TENSOR_PMUREG_RMW 2
static const struct regmap_range gs101_pmu_registers[] = {
regmap_reg_range(GS101_OM_STAT, GS101_SYSTEM_INFO),
regmap_reg_range(GS101_IDLE_IP(0), GS101_IDLE_IP_MASK(3)),
regmap_reg_range(GS101_DATARAM_STATE_SLC_CH(0),
GS101_PPMPURAM_INFORM_SCL_CH(3)),
regmap_reg_range(GS101_INFORM0, GS101_SYSIP_DAT(0)),
/* skip SYSIP_DAT1 SYSIP_DAT2 */
regmap_reg_range(GS101_SYSIP_DAT(3), GS101_PWR_HOLD_SW_TRIP),
regmap_reg_range(GS101_GSA_INFORM(0), GS101_GSA_INFORM(1)),
regmap_reg_range(GS101_INFORM4, GS101_IROM_INFORM),
regmap_reg_range(GS101_IROM_CPU_INFORM(0), GS101_IROM_CPU_INFORM(7)),
regmap_reg_range(GS101_PMU_SPARE(0), GS101_PMU_SPARE(3)),
/* skip most IROM_xxx registers */
regmap_reg_range(GS101_DREX_CALIBRATION(0), GS101_DREX_CALIBRATION(7)),
#define CLUSTER_CPU_RANGE(cl, cpu) \
regmap_reg_range(GS101_CLUSTER_CPU_CONFIGURATION(cl, cpu), \
GS101_CLUSTER_CPU_OPTION(cl, cpu)), \
regmap_reg_range(GS101_CLUSTER_CPU_OUT(cl, cpu), \
GS101_CLUSTER_CPU_IN(cl, cpu)), \
regmap_reg_range(GS101_CLUSTER_CPU_INT_IN(cl, cpu), \
GS101_CLUSTER_CPU_INT_DIR(cl, cpu))
/* cluster 0..2 and cpu 0..4 or 0..1 */
CLUSTER_CPU_RANGE(GS101_CLUSTER0_OFFSET, 0),
CLUSTER_CPU_RANGE(GS101_CLUSTER0_OFFSET, 1),
CLUSTER_CPU_RANGE(GS101_CLUSTER0_OFFSET, 2),
CLUSTER_CPU_RANGE(GS101_CLUSTER0_OFFSET, 3),
CLUSTER_CPU_RANGE(GS101_CLUSTER1_OFFSET, 0),
CLUSTER_CPU_RANGE(GS101_CLUSTER1_OFFSET, 1),
CLUSTER_CPU_RANGE(GS101_CLUSTER2_OFFSET, 0),
CLUSTER_CPU_RANGE(GS101_CLUSTER2_OFFSET, 1),
#undef CLUSTER_CPU_RANGE
#define CLUSTER_NONCPU_RANGE(cl) \
regmap_reg_range(GS101_CLUSTER_NONCPU_CONFIGURATION(cl), \
GS101_CLUSTER_NONCPU_OPTION(cl)), \
regmap_reg_range(GS101_CLUSTER_NONCPU_OUT(cl), \
GS101_CLUSTER_NONCPU_IN(cl)), \
regmap_reg_range(GS101_CLUSTER_NONCPU_INT_IN(cl), \
GS101_CLUSTER_NONCPU_INT_DIR(cl)), \
regmap_reg_range(GS101_CLUSTER_NONCPU_DUALRAIL_CTRL_OUT(cl), \
GS101_CLUSTER_NONCPU_DUALRAIL_POS_OUT(cl)), \
regmap_reg_range(GS101_CLUSTER_NONCPU_DUALRAIL_CTRL_IN(cl), \
GS101_CLUSTER_NONCPU_DUALRAIL_CTRL_IN(cl))
CLUSTER_NONCPU_RANGE(0),
regmap_reg_range(GS101_CLUSTER0_NONCPU_DSU_PCH,
GS101_CLUSTER0_NONCPU_DSU_PCH),
CLUSTER_NONCPU_RANGE(1),
CLUSTER_NONCPU_RANGE(2),
#undef CLUSTER_NONCPU_RANGE
#define SUBBLK_RANGE(blk) \
regmap_reg_range(GS101_SUBBLK_CONFIGURATION(blk), \
GS101_SUBBLK_CTRL(blk)), \
regmap_reg_range(GS101_SUBBLK_OUT(blk), GS101_SUBBLK_IN(blk)), \
regmap_reg_range(GS101_SUBBLK_INT_IN(blk), \
GS101_SUBBLK_INT_DIR(blk)), \
regmap_reg_range(GS101_SUBBLK_MEMORY_OUT(blk), \
GS101_SUBBLK_MEMORY_IN(blk))
SUBBLK_RANGE(GS101_SUBBBLK_OFFSET_ALIVE),
SUBBLK_RANGE(GS101_SUBBBLK_OFFSET_AOC),
SUBBLK_RANGE(GS101_SUBBBLK_OFFSET_APM),
SUBBLK_RANGE(GS101_SUBBBLK_OFFSET_CMU),
SUBBLK_RANGE(GS101_SUBBBLK_OFFSET_BUS0),
Annotation
- Immediate include surface: `linux/arm-smccc.h`, `linux/array_size.h`, `linux/soc/samsung/exynos-pmu.h`, `linux/soc/samsung/exynos-regs-pmu.h`, `linux/regmap.h`, `exynos-pmu.h`.
- Detected declarations: `function tensor_sec_reg_write`, `function tensor_sec_reg_rmw`, `function tensor_sec_reg_read`, `function tensor_set_bits_atomic`, `function tensor_is_atomic`, `function tensor_sec_update_bits`.
- Atlas domain: Driver Families / drivers/soc.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.