drivers/soc/tegra/pmc.c
Source file repositories/reference/linux-study-clean/drivers/soc/tegra/pmc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/soc/tegra/pmc.c- Extension
.c- Size
- 138333 bytes
- Lines
- 5092
- Domain
- Driver Families
- Bucket
- drivers/soc
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/arm-smccc.hlinux/clk.hlinux/clk-provider.hlinux/clkdev.hlinux/clk/clk-conf.hlinux/clk/tegra.hlinux/debugfs.hlinux/delay.hlinux/device.hlinux/err.hlinux/export.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/iopoll.hlinux/irqdomain.hlinux/irq.hlinux/irq_work.hlinux/kernel.hlinux/of_address.hlinux/of_clk.hlinux/of.hlinux/of_irq.hlinux/of_platform.hlinux/pinctrl/pinconf-generic.hlinux/pinctrl/pinconf.hlinux/pinctrl/pinctrl.hlinux/platform_device.hlinux/pm_domain.hlinux/pm_opp.hlinux/power_supply.hlinux/reboot.h
Detected Declarations
struct pmc_clkstruct pmc_clk_gatestruct pmc_clk_init_datastruct tegra_pmc_core_pdstruct tegra_powergatestruct tegra_io_pad_socstruct tegra_io_pad_vctrlstruct tegra_pmc_regsstruct tegra_wake_eventstruct tegra_pmc_socstruct tegra_pmcfunction to_core_pdfunction to_powergatefunction tegra_pmc_readlfunction tegra_pmc_writelfunction tegra_pmc_scratch_readlfunction tegra_pmc_scratch_writelfunction tegra_powergate_statefunction tegra_powergate_is_validfunction tegra_powergate_is_availablefunction tegra_powergate_lookupfunction tegra20_powergate_setfunction tegra_powergate_toggle_readyfunction tegra114_powergate_setfunction tegra_powergate_setfunction __tegra_powergate_remove_clampingfunction registerfunction tegra_powergate_prepare_clocksfunction tegra_powergate_unprepare_clocksfunction tegra_powergate_disable_clocksfunction tegra_powergate_enable_clocksfunction tegra_powergate_power_upfunction tegra_powergate_power_downfunction tegra_genpd_power_onfunction tegra_genpd_power_offfunction tegra_pmc_put_devicefunction devm_tegra_pmc_getfunction tegra_pmc_powergate_power_onfunction tegra_pmc_powergate_power_offfunction tegra_powergate_is_poweredfunction tegra_pmc_powergate_remove_clampingfunction tegra_pmc_powergate_sequence_power_upfunction tegra_pmc_program_reboot_reasonfunction tegra_pmc_reboot_notifyfunction tegra_pmc_restartfunction tegra_pmc_restart_handlerfunction tegra_pmc_grouper_power_off_handlerfunction powergate_show
Annotated Snippet
struct pmc_clk {
struct clk_hw hw;
struct tegra_pmc *pmc;
unsigned long offs;
u32 mux_shift;
u32 force_en_shift;
};
#define to_pmc_clk(_hw) container_of(_hw, struct pmc_clk, hw)
struct pmc_clk_gate {
struct clk_hw hw;
struct tegra_pmc *pmc;
unsigned long offs;
u32 shift;
};
#define to_pmc_clk_gate(_hw) container_of(_hw, struct pmc_clk_gate, hw)
struct pmc_clk_init_data {
char *name;
const char *const *parents;
int num_parents;
int clk_id;
u8 mux_shift;
u8 force_en_shift;
};
static const char * const clk_out1_parents[] = { "osc", "osc_div2",
"osc_div4", "extern1",
};
static const char * const clk_out2_parents[] = { "osc", "osc_div2",
"osc_div4", "extern2",
};
static const char * const clk_out3_parents[] = { "osc", "osc_div2",
"osc_div4", "extern3",
};
static const struct pmc_clk_init_data tegra_pmc_clks_data[] = {
{
.name = "pmc_clk_out_1",
.parents = clk_out1_parents,
.num_parents = ARRAY_SIZE(clk_out1_parents),
.clk_id = TEGRA_PMC_CLK_OUT_1,
.mux_shift = 6,
.force_en_shift = 2,
},
{
.name = "pmc_clk_out_2",
.parents = clk_out2_parents,
.num_parents = ARRAY_SIZE(clk_out2_parents),
.clk_id = TEGRA_PMC_CLK_OUT_2,
.mux_shift = 14,
.force_en_shift = 10,
},
{
.name = "pmc_clk_out_3",
.parents = clk_out3_parents,
.num_parents = ARRAY_SIZE(clk_out3_parents),
.clk_id = TEGRA_PMC_CLK_OUT_3,
.mux_shift = 22,
.force_en_shift = 18,
},
};
struct tegra_pmc_core_pd {
struct generic_pm_domain genpd;
struct tegra_pmc *pmc;
};
static inline struct tegra_pmc_core_pd *
to_core_pd(struct generic_pm_domain *genpd)
{
return container_of(genpd, struct tegra_pmc_core_pd, genpd);
}
struct tegra_powergate {
struct generic_pm_domain genpd;
struct tegra_pmc *pmc;
unsigned int id;
struct clk **clks;
unsigned int num_clks;
unsigned long *clk_rates;
struct reset_control *reset;
};
struct tegra_io_pad_soc {
enum tegra_io_pad id;
Annotation
- Immediate include surface: `linux/arm-smccc.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/clkdev.h`, `linux/clk/clk-conf.h`, `linux/clk/tegra.h`, `linux/debugfs.h`, `linux/delay.h`.
- Detected declarations: `struct pmc_clk`, `struct pmc_clk_gate`, `struct pmc_clk_init_data`, `struct tegra_pmc_core_pd`, `struct tegra_powergate`, `struct tegra_io_pad_soc`, `struct tegra_io_pad_vctrl`, `struct tegra_pmc_regs`, `struct tegra_wake_event`, `struct tegra_pmc_soc`.
- Atlas domain: Driver Families / drivers/soc.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.